CD4504BMS Datasheet, PDF (1/8 Pages) Intersil Corporation – CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation

CD4504BMS
December 1992
CMOS Hex Voltage Level Shifter for
TTL-to-CMOS or CMOS-to-CMOS Operation
Features
Pinout
• High Voltage Type (20V Rating)
• Independence of Power Supply Sequence Consider-
ations
- VCC can Exceed VDD
- Input Signals can Exceed Both VCC and VDD
• Up and Down Level Shifting Capability
• Shiftable Input Threshold for Either CMOS or TTL
Compatibility
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
CD4504BMS
TOP VIEW
VCC 1
AOUT 2
AIN 3
BOUT 4
BIN 5
COUT 6
CIN 7
VSS 8
16 VDD
15 FOUT
14 FIN
13 SELECT
12 EOUT
11 EIN
10 DOUT
9 DIN
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25^oC
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Functional Diagram
Description
CD4504BMS hex voltage level shifter consists of six circuits
which shift input signals from the VCC logic level to the VDD
logic level. To shift TTL signals to CMOS logic levels, the
SELECT input is at the VCC HIGH logic state. When the
SELECT input is at a LOW logic state, each circuit translates
signals from one CMOS level to another.
The CD4504BMS is supplied in these 16-lead outline packages:
Frit Seal DIP
H1F
Ceramic Flatpack H6W
VCC
* IN
(3, 5, 7, 9, 11, 14)
VDD
LEVEL
SHIFTER
OUT
(2, 4, 6, 10, 12, 15)
SELECT ^*
13
TTL/CMOS
MODE SELECT
VCC = PIN 1
VDD = PIN 16
VSS = PIN 8
VDD
* ^{ALL INPUTS ARE PROTECTED}
BY CMOS PROTECTION
NETWORK
VSS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1140
File Number 3336