ISL6123_11 Datasheet, PDF (7/23 Pages) Intersil Corporation – Power Sequencing Controllers

ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128, ISL6130
Electrical Specifications V_DD = 1.5V to +5V, T_A = T_J = -40°C to +85°C, unless otherwise specified. Boldface limits apply over the
operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 7)
MAX
TYP
(Note 7) UNIT
RESET Delay after GATE High
RESET Output Low
T_RSTdel
V_RSTl
GATE = V_DD+5V
Measured at V_DD = 5V with 5k
pull-up resistors
160
ms
0.1
V
RESET Output Capacitance
SYSRST Pull-Up Voltage
SYSRST Pull-Down Current
SYSRST Low Output Voltage
SYSRST Output Capacitance
C_{OUT_RST}
Vpu_srst
Ipu_1.5
Ipu_5
Vol_srst
Cout_srst
V_DD = 1.5V
V_DD = 5V
V_DD = 1.5V, I_OUT = 100µA
10
pF
V_DD
V
5
µA
100
µA
150
mV
10
pF
SYSRST Low to GATE Turn-Off
GATE
t_{delSYS_G} GATE = 80% of V_DD + 5V
40
ns
GATE Turn-On Current
GATE Turn-Off Current
GATE Current Range
GATE Turn-On/Off Current Temperature
Coefficient
I_GATEon
I_{GATEoff_l}
I_{GATE_range}
TC_I_GATE
GATE = 0V
GATE = V_DD, Disabled
Within IC I_GATE max-min
0.8
1.1
1.4
µA
-1.4
-1.05
-0.8
µA
0.35
µA
0.2
nA/°C
GATE Pull-Down High Current
GATE High Voltage
GATE Low Voltage
ISL6125 Open Drain
I_{GATEoff_h}
V_GATEh
V_GATEh
V_GATEl
GATE = V_DD, UVLO = 0V
V_DD < 2V, T_J = +25°C
V_DD > 2V
Gate Low Voltage, V_DD = 1V
88
mA
V_DD + 4.9V
V
V_DD + 5V V_DD + 5.3V
V
0
0.1
V
Open Drain On Resistance
BIAS
R_{DSON_5V}
R_{DSON_3.3V}
R_{DSON_2.5V}
V_DD = 5V, EN = V_DD
V_DD = 3.3V, EN = V_DD
V_DD = 2.5V, EN = V_DD
25
Ω
32
Ω
40
Ω
IC Supply Current
I_{VDD_5V}
V_DD = 5V
0.20
0.5
mA
I_{VDD_3.3V} V_DD = 3.3V
0.14
mA
I_{VDD_1.5V} V_DD = 1.5V
0.10
mA
ISL6123, ISL6130 Stand By IC Supply Current
I_{VDD_sb}
V_DD = 5V, ENABLE = 0V
1
µA
V_DD Power-on Reset
V_DD_POR
1
V
NOTE:
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Descriptions and Operation
The ISL612X sequencer family consists of several 4-channel
voltage sequencing controllers in various functional and
personality configurations. All are designed for use in
multiple-voltage systems requiring power sequencing of
various supply voltages. Individual voltage rails are gated on
and off by external N-Channel MOSFETs, the gates of which
are driven by an internal charge pump to V_DD + 5.3V (VQP) in
a user-programmed sequence.
With the 4-channel ISL6123, ENABLE must be asserted high,
and all four voltages to be sequenced must be above their
respective user-programmed undervoltage lockout (UVLO)
levels before programmed output turn-on sequencing can
begin. Sequencing and delay are determined by the choice of
external capacitor values on the DLY_ON and DLY_OFF pins.
7
FN9005.11
August 25, 2011