X9401_15 Datasheet, PDF (6/20 Pages) Intersil Corporation – Quad, 64 Tap, Digitally Controlled Potentiometer

Detailed Potentiometer Block Diagram
(ONE OF FOUR ARRAYS)
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0
8
REGISTER 2
IF WCR = 00[H] THEN V_W/R_W = V_L/R_L
IF WCR = 3F[H] THEN V_W/R_W = V_H/R_H
X9401
SERIAL
BUS
INPUT
C
REGISTER 1
O
U
6
PARALLEL
BUS
INPUT
N
T
E
R
REGISTER 3
WIPER
COUNTER
D
REGISTER
E
(WCR)
C
O
D
E
UP/DN
INC/DEC
LOGIC
UP/DN
MODIFIED SCL
CLK
V_H/R_H
V_L/R_L
CS
SCK
V_W/R_W
SI
0 1 0 1 0 0 A1 A0
I3 I2 I1 I0 R1 R0 P1 P0
FIGURE 3. TWO-BYTE COMMAND SEQUENCE
CS
SCL
SI
0 1 0 1 0 0 A1 A0
I3 I2 I1 I0 R1 R0 P1 P0
0 0 D5 D4 D3 D2 D1 D0
FIGURE 4. THREE-BYTE COMMAND SEQUENCE (WRITE)
6
FN8190.5
September 14, 2015