X9401_15 Datasheet, PDF (3/20 Pages) Intersil Corporation – Quad, 64 Tap, Digitally Controlled Potentiometer

X9401
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD may be used to pause the serial
communication with the controller without resetting the serial
sequence. To pause, HOLD must be brought LOW while
SCK is LOW. To resume communication, HOLD is brought
HIGH, again while SCK is LOW. If the pause feature is not
used, HOLD should be held HIGH at all times.
DEVICE ADDRESS (A₀ - A₁)
The address inputs are used to set the least significant 2 bits of the
8-bit slave address. A match in the slave address serial data
stream must be made with the address input in order to
initiate communication with the X9401. A maximum of 4
devices may occupy the SPI serial bus.
Potentiometer Pins
V_H (V_H0 - V_H3)/ R_H (R_H0 - R_H3),
V_L (V_L0 - V_L3)/R_L (R_L0 - R_L3)
The V_H/R_H and V_L/R_L inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW (VW0 - VW3)/ RW (RW0 - RW3)
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to the
Wiper Counter Registers.
Pinouts
X9401
(24 LD SOIC)
TOP VIEW
V_CC 1
V_L0/R_L0 2
V_H0/R_H0 3
V_W0/R_W0 4
CS 5
WP 6
SI 7
A₁ 8
V_L1/R_L1 9
V_H1/R_H1 10
V_W1/R_W1 11
V_SS 12
X9401
24 NC
23 V_L3/R_L3
22 V_H3/R_H3
21 V_W3/R_W3
20 A₀
19 S0
18 HOLD
17 SCK
16 V_L2/R_L2
15 V_H2/R_H2
14 V_W2/R_W2
13 NC
(24 LD TSSOP)
TOP VIEW
SI 1
A₁ 2
V_L1/R_L1 3
V_H1/R_H1 4
V_W1/R_W1 5
V_SS 6
NC 7
V_W2/R_W2 8
V_H2/R_H2 9
V_L2/R_L2 10
SCK 11
HOLD 12
24 WP
23 CS
22 V_W0/R_W0
21 V_H0/R_H0
20 V_L0/R_L0
19 V_CC
18 NC
17 V_L3/R_L3
16 V_H3/R_H3
15 V_W3/R_W3
14 A₀
13 S0
Pin Descriptions
SOIC TSSOP
PIN # PIN #
SYMBOL
DESCRIPTION
5
23
CS
Chip select
17
11
SCK
Serial Clock
7, 19 1, 13
SI, S0
Serial Data
20, 8
3, 10,
15, 22,
2, 9,
16, 23
4, 11,
14, 21
6
14, 2
21, 4,
9, 16,
20, 3,
10, 17
22, 5,
8, 15
24
A₀ - A₁
Device Address
V_H0/R_H0,V_H1/R_H1,
V_H2/R_H2, V_H3/R_H3,
V_L0/R_L0, V_L1/R_L1,
V_L2/R_L2, V_L3/R_L3
Potentiometer end
terminals
V_W0/R_W0, V_W1/R_W1, Wipers
V_W2/R_W2, V_W3/R_W3
WP
Hardware Write Protection
18
12
HOLD
Hardware Hold
1
12
13, 24
19
6
7, 18
V_CC
V_SS
NC
System Supply Voltage
System Ground
No Connection
Device Description
The X9401 is a highly integrated microcircuit incorporating
four resistor arrays and their associated registers and
counters and the serial interface logic providing direct
communication between the host and the XDCP
potentiometers.
Serial Interface
The X9401 supports the SPI interface hardware
conventions. The device is accessed via the SI input with
data clocked in on the rising SCK. CS must be LOW and the
HOLD and WP pins must be HIGH during the entire
operation.
The SO and SI pins can be connected together, since they
have three state outputs. This can help to reduce system pin
count.
3
FN8190.5
September 14, 2015