ISL12021 Datasheet, PDF (6/24 Pages) Intersil Corporation – Real Time Clock with On Chip Temp Compensation ±5ppm

ISL12021
EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR V_DD = 5V
5.0V
SDA,
IRQ and FOUT
1533Ω
FOR V_OL= 0.4V
AND I_OL = 3mA
100pF
FIGURE 1. STANDARD OUTPUT LOAD FOR TESTING THE
DEVICE WITH V_DD = 5.0V
General Description
The ISL12021 device is a low power real time clock (RTC)
with embedded temperature sensors. It contains crystal
frequency compensation circuitry over the operating
temperature range, clock/calendar, power fail and low
battery monitors, brown out indicator with separate
(LVRSET) reset pin, 1 periodic or polled alarm, intelligent
battery backup switching and 128 Bytes of battery-backed
user SRAM.
The oscillator uses an external, low cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes and seconds. The device has calendar
registers for date, month, year and day of the week. The
calendar is accurate through 2099, with automatic leap year
correction. In addition, the ISL12021 could be programmed
for automatic Daylight Saving Time (DST) adjustment by
entering local DST information.
The ISL12021’s alarm can be set to any clock/calendar
value for a match. For example, every minute, every
Tuesday or at 5:23 AM on March 21. The alarm status is
available by checking the Status Register, or the device can
be configured to provide a hardware interrupt via the IRQ
pin. There is a repeat mode for the alarm allowing a periodic
interrupt every minute, every hour, every day, etc.
The device also offers a backup power input pin. This V_BAT
pin allows the device to be backed up by battery or Super
Cap with automatic switchover from V_DD to V_BAT. The
ISL12021 device is specified for V_DD = 2.7V to 5.5V and the
clock/calendar portion of the device remains fully operational
in battery backup mode down to 1.8V (Standby Mode). The
V_BAT level is monitored and reported against preselected
levels. The first report is registered when the V_BAT level falls
below 85% of nominal level, the second level is set for 75%.
Battery levels are stored in V_BATM registers.
The ISL12021 offers a “Brown Out” alarm once the V_DD falls
below a pre-selected trip level. This allows system CPU to
save vital information to memory before complete power
loss. There are six V_DD levels that could be selected for
initiation of brown out alarm.
Pin Descriptions
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal
is used with the device to supply a timebase for the real time
clock. Internal compensation circuitry with internal
temperature sensor provides frequency corrections for
selected popular crystals to ±5ppm over the operating
temperature range from -40°C to +85°C. (See “Application
Section” on page 21 for recommended crystal). The
ISL12021 allows the user to input via I²C serial bus the
temperature variation profiles of crystals not listed in the
“Application Section” on page 21. This oscillator
compensation network can also be used to calibrate the
initial crystal timing accuracy at room temperature. The
device can also be driven directly from a 32.768kHz source
at pin X1.
X1
X2
FIGURE 2. RECOMMENDED CRYSTAL CONNECTION
VBAT
This input provides a backup supply voltage to the device.
VBAT supplies power to the device in the event that the VDD
supply fails. This pin can be connected to a battery, a Super
Capacitor or tied to ground if not used. See the Battery
Monitor parameter in the DC Operating Characteristics-RTC
on page 3.
IRQ (Interrupt Output)
This pin provides an interrupt signal output. This signal
notifies a host processor that an alarm has occurred and
requests action. It is an open drain active low output. Once
triggered, the output will stay low until the Alarm status
register bit is reset or, if the autoreset function is used, a
read is performed to the status register.
F_OUT (Frequency Output)
This pin outputs a clock signal which is related to the crystal
frequency. The frequency output is user selectable and
enabled via the I²C bus. It is an open drain output.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
V_BAT pin is activated to minimize power consumption.
6
FN6451.0
March 30, 2007