ICM7170 Datasheet, PDF (6/13 Pages) Intersil Corporation – Microprocessor-Compatible, Real-Time Clock

Timing Diagrams (Continued)
ICM7170
A0 - A4, D0 - D7, CS
ALE
WR
ADDRESS VALID, CS LOW
t_LL
t_AL
t_AD
INPUT DATA VALID
t_LA
t_DW
t_WD
t_WA
t_CYC
t_WL
FIGURE 4. WRITE CYCLE TIMING FOR MULTIPLEXED BUS (RD = V_IH)
Pin Descriptions
SIGNAL
WR
ALE
CS
A4-A0
OSC OUT
OSC IN
INT SOURCE
INTERRUPT
V_SS (GND)
V_BACKUP
D0 - D7
V_DD
RD
PIN NUMBER
1
2
3
4-8
9
10
11
12
13
14
15 - 22
23
24
SOIC
PIN NUMBER
19
20
21
22 - 2
3
4
5
6
7
8
9 - 16
17
18
DESCRIPTION
Write Input
Address Latch Enable Input
Chip Select Input
Address Inputs
Oscillator Output
Oscillator Input
Interrupt Source
Interrupt Output
Digital Common
Battery Negative Side
Data I/O
Positive Digital Supply
Read Input
TABLE 1. COMMAND REGISTER FORMAT
COMMAND REGISTER ADDRESS (10001b, 11h) WRITE-ONLY
D7
D6
D5
D4
D3
D2
D1
D0
n/a
n/a
Normal/Test
Interrupt
Run/Stop
12/24 Hour
Crystal
Crystal
Mode
Enable
Format
Frequency
Frequency
TABLE 2. COMMAND REGISTER BIT ASSIGNMENTS
INTERRUPT
24/12 HOUR
CRYSTAL
D5
TEST BIT
D4
ENABLE
D3 RUN/STOP D2
FORMAT
D1 D0 FREQUENCY
0 Normal Mode 0 Interrupt disabled 0
Stop
0 12-Hour Mode 0 0
32.768kHz
1
Test Mode
1
Interrupt enable
1
Run
1 24-Hour Mode 0 1 1.048576MHZ
1
0
2.097152MHz
1
1
4.194304MHz
12-10