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DG406_06 Datasheet, PDF (6/13 Pages) Intersil Corporation – Single 16-Channel/Differential 8-Channel, CMOS Analog Multiplexers
DG406, DG407
Electrical Specifications Single Supply Test Conditions: V+ = 12V, V- = 0V, VAL = 0.8V, VAH = 2.4V,
Unless Otherwise Specified (Continued)
PARAMETER
TEST
CONDITIONS
TEMP (oC)
(NOTE 3)
MIN
(NOTE 4)
TYP
(NOTE 3)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
Full
Drain-Source ON-Resistance,
rDS(ON)
VD = 3V, 10V, IS = -1mA
25
(Note 5)
rDS(ON) Matching Between
25
Channels (Note 6), ∆rDS(ON)
Source Off Leakage Current, IS(OFF)
VEN = 0V, VD = 10V or 0.5V,
25
Drain Off Leakage Current, ID(OFF)
VS = 0.5V or 10V
DG406
25
0
-
12
V
-
90
120
Ω
-
5
-
%
-
0.01
-
nA
-
0.04
-
nA
DG407
25
-
0.04
-
nA
Drain On Leakage Current, ID(ON)
VS = VD = ±10V (Note 5)
DG406
25
-
0.04
-
nA
DG407
25
-
0.04
-
nA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current (I+)
(Standby)
VEN = 0V or 5V,
VA = 0V or 5V
25
-
13
30
µA
Full
-
13
75
µA
Negative Supply Current (I-)
(Enabled)
25
-1
-0.01
-
µA
Full
-5
-0.01
-
µA
NOTES:
3. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
4. Typical values are for Design Aid Only, not guaranteed nor production tested.
5. Sequence each switch ON.
6. ∆rDS(ON) = (rDS(ON)(Max) - rDS(ON)(Min)) ÷ rDS(ON) average.
7. Worst case isolation occurs on channel 8B due to proximity to the drain pin.
Test Circuits and Waveforms
+15V
+2.4V
LOGIC
INPUT
50Ω
EN V+
S1
A3
S2 - S15
A2
A1
DG406 S16
A0 GND V- D
±10V
10V
300Ω
-15V
VO
35pF
FIGURE 1A. DG406 TEST CIRCUIT
+15V
+2.4V
LOGIC
INPUT
50Ω
EN V+ S1B
±10V
†
A2
DG407
A1
S8B
10V
A0 GND V- DB
300Ω
-15V
† = S1A - S8A, S2B - S7B, DA
VO
35pF
FIGURE 1B. DG407 TEST CIRCUIT
6
FN3116.9
March 13, 2006