CD4095BMS Datasheet, PDF (6/10 Pages) Intersil Corporation – CMOS Gated J-K Master-Slave Flip-Flops

Specifications CD4095BMS, CD4096BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
CD4095BMS
Static Burn-In 1
1, 6, 8
2-5, 7, 9-13
14
Note 1
Static Burn-In 2
Note 1
1, 6, 8
7
2-5, 9-14
Dynamic Burn-
1
2, 7, 13
3-5, 9-11, 14
6, 8
-
12
In Note 1
Irradiation
Note 2
1, 6, 8
7
2-5, 9-14
CD4096BMS
Static Burn-In 1
1, 6, 8
2-5, 7, 9-13
14
Note 1
Static Burn-In 2
Note 1
1, 6, 8
7
2-5, 9-14
Dynamic Burn-
1
2, 5, 7, 9, 13
3, 4, 10, 11, 14
6, 8
12
In Note 1
Irradiation
Note 2
1, 6, 8
7
2-5, 9-14
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
7-1099