ISL5416_04 Datasheet, PDF (54/71 Pages) Intersil Corporation – Four-Channel Wideband Programmable DownConverter

ISL5416
TABLE 71. NCO 1 OUTPUT RATE -- TOP 32 BITS (IWA = *011h) RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:0 RSout(48:16). This NCO sets the re-sampler output sample rate when the IHBF/Resampler block is enabled. If the HOIF is bypassed,
this is 2x the AGC (and FIR2) output rate. NOTE that the re-sampler only interpolates. The re-sampler output can be decimated using
a counter. The decimation is programmed in IWA = *007h, bits 18:16.
Fout = Fs * RSout / (2^48), where RSout = 0 to 2^48 -1, Fout = 0 to ~Fs.
Bits 48:16 of the active register are read back at this location.
If HOIF is enabled, then F_out must be ≤ F_CLK/2
If IHBF is enabled, HOIF disabled, then F_out must be ≤ F_CLK
P(31:0)
31:16
15:0
TABLE 72. NCO 1 OUTPUT RATE -- LOWER 16 BITS (IWA = *012h) RESET STATE = 0x00000000h
FUNCTION
RSout(15:0). See IWA = *011h. Bits 15:0 of the active register are read back at this location.
UNUSED.
P(31:0)
31:0
TABLE 73. NCO 2 INPUT RATE -- TOP 32 BITS (IWA = *013h) RESET STATE = 0x00000000h
FUNCTION
RSin(48:16). This NCO sets the output sample rate for the FIFO (input sample rate to the IHBF/Resampler block) when the
IHBF/Resampler block is enabled. If the HOIF is bypassed, this has no effect.
Fin = Fout * RSin / (2^48), where RSin = 0 to 2^48 -1, Fin = 0 to ~Fout.
Fin should be set equal to the output sample rate of FIR2 (Fs / (CICdeci * FIR1deci * FIR2deci)).
Bits 48:16 of the active register are read back at this location.
P(31:0)
31:16
15:0
TABLE 74. NCO 2 INPUT RATE -- LOWER 16 BITS (IWA = *014h) RESET STATE = 0x00000000h
FUNCTION
RSin(15:0). See IWA = *013.
Bits 15:0 of the active register are read back at this location.
UNUSED.
Register IWA = *015h is used to add delay to a channel. The output timing is unaffected (except at startup from reset). but the
group delay of the channel is adjusted. If the IHBF and HOIF are both enabled, the total delay range is 0 to 1023/256 FIR2 output
sample periods. NOTE: The HOIF can be enabled with no rate change by setting the NCO2 register (IWA = *013h and *014h) to
zero and setting the bit 22 of IWA = *001h.
TABLE 75. PHASE OFFSET (IWA = *015h) RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:11 RESERVED. Set to 0.
10:9 FIFO DEPTH. After reset, the FIFO waits until it reaches a depth of 2 + this value (total of 2, 3, 4, or 5) before allowing FIFO reads.
These bits can be used to add delay in increments of the FIR2 output sample rate.
HOIF or IHBF must be enabled.
8
HOIF INPUT DELAY.
1 = one HOIF input sample delay is added.
HOIF must be enabled.
7:0
RESAMPLER PHASE OFFSET. Allows the output sample timing to be shifted in increments of 1/256 the HOIF input period.
00 = least delay.
FF = most delay.
HOIF must be enabled.
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