X9401_06 Datasheet, PDF (5/19 Pages) Intersil Corporation – Quad, 64 Tap, Digitally Controlled Potentiometer

X9401
one of the data registers or directly between the host
and the Wiper Counter Register. These instructions
are:
– Read Wiper Counter Register— read the current
wiper position of the selected pot,
– Write Wiper Counter Register—change current
wiper position of the selected pot,
– Read Data Register—read the contents of the
selected data register;
– Write Data Register—write a new value to the
selected data register.
– Read Status—This command returns the contents
of the WIP bit which indicates if the internal write
cycle is in progress.
The sequence of these operations is shown in Figure 4
and Figure 5.
The final command is Increment/Decrement. It is dif-
ferent from the other commands, because it’s length is
indeterminate. Once the command is issued, the mas-
ter can clock the selected wiper up and/or down in one
resistor segment steps; thereby, providing a fine tun-
ing capability to the host. For each SCK clock pulse
(t_HIGH) while SI is HIGH, the selected wiper will move
one resistor segment towards the V_H/R_H terminal.
Similarly, for each SCK clock pulse while SI is LOW,
the selected wiper will move one resistor segment
towards the V_L/R_L terminal. A detailed illustration of the
sequence and timing for this operation are shown in
Figure 6 and Figure 7.
Detailed Potentiometer Block Diagram
(One of Four Arrays)
Serial Data Path
From Interface
Circuitry
Register 0
8
Register 2
If WCR = 00[H] then V_W/R_W = V_L/R_L
If WCR = 3F[H] then V_W/R_W = V_H/R_H
Serial
Bus
Input
C
Register 1
o
u
6
Parallel
Bus
Input
n
t
e
r
Register 3
Wiper
Counter
D
Register
e
(WCR)
c
o
d
e
UP/DN
INC/DEC
Logic
UP/DN
Modified SCL
CLK
V_H/R_H
V_L/R_L
V_W/R_W
5
FN8190.3
October 12, 2006