X4003-05 Datasheet, PDF (5/16 Pages) Intersil Corporation – Selectable watchdog timer

WP
SCL
SDA
X4003, X4005
V_P = 15V TO 18V
0 1 23 4 56 7
0 1 23 4 56 7
0 1 23 4 56 7
A0h
03h
00h
FIGURE 3. RESET V_TRIP LEVEL SEQUENCE (V_CC > 3V. WP = 15V TO 18V)
V_TRIP
ADJ.
4.7k
RESET/RESET
1
8
2
X4003
X4005
7
3
6
4
5
V_P
ADJUST
RUN
FIGURE 4. SAMPLE V_TRIP RESET CIRCUIT
Resetting the V_TRIP Voltage
This procedure is used to set the V_TRIP to a “native” voltage
level. For example, if the current V_TRIP is 4.4V and the new
V_TRIP must be 4.0V, then the V_TRIP must be reset. When
V_TRIP is reset, the new V_TRIP is something less than 1.7V.
This procedure must be used to set the voltage to a lower
value.
To reset the new V_TRIP voltage, apply the desired V_TRIP
threshold voltage to the V_CC pin and tie the WP pin to the
programming voltage V_P. Then write 00h to address 03h.
The stop bit of a valid write operation initiates the V_TRIP
programming sequence. Bring WP LOW to complete the
operation.
µC
SCL
SDA
5
FN8113.2
June 30, 2008