X4003-05 Datasheet, PDF (11/16 Pages) Intersil Corporation – Selectable watchdog timer

X4003, X4005
Equivalent AC Load Circuit
5V
5V
SDA
1533
For V_OL = 0.4V
and I_OL = 3mA
100pF
RESET
RESET
4.6k
100pF
AC Test Conditions
Input pulse levels
Input rise and fall times
Input and output timing levels
Output load
0.1V_CC to 0.9V_CC
10ns
0.5V_CC
Standard output load
AC Electrical Specifications Over recommended operating conditions, unless otherwise specified.
100kHz
400kHz
SYMBOL
PARAMETER
MIN MAX
MIN
MAX
f_SCL
t_IN
t_AA
t_BUF
t_LOW
t_HIGH
t_SU:STA
t_HD:STA
t_SU:DAT
t_HD:DAT
t_SU:STO
t_DH
t_R
SCL Clock Frequency
Pulse Width Suppression Time at Inputs
SCL LOW to SDA Data Out Valid
Time the Bus Free Before Start of New Transmission
Clock LOW Time
Clock HIGH Time
Start Condition Set-up Time
Start Condition Hold Time
Data in Setup Time
Data in Hold Time
Stop Condition Set-up Time
Data Output Hold Time
SDA and SCL Rise Time
0
100
0
400
n/a
n/a
50
0.1
0.9
0.1
0.9
4.7
1.3
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
250
100
5.0
0
0.6
0.6
50
50
1000 20 + 0.1Cb
300
(Note 5)
t_F
SDA and SCL Fall Time
300
20 + 0.1Cb
300
(Note 5)
t_SU:WP
t_HD:WP
Cb
WP Set-up Time
WP Hold Time
Capacitive Load for Each Bus Line
0.4
0.6
0
0
400
400
NOTES:
4. Typical values are for T_A = +25°C and V_CC = 5.0V
5. Cb = total capacitance of one bus line in pF
UNIT
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
µs
µs
pF
11
FN8113.2
June 30, 2008