X4003-05 Datasheet, PDF (3/16 Pages) Intersil Corporation – Selectable watchdog timer

X4003, X4005
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
PART V_CC RANGE V_TRIP RANGE TEMP. RANGE
MARKING
(V)
(V)
(°C)
PACKAGE PKG. DWG. #
X4003S8I-2.7A X4003 AP X4005S8I-2.7A X4005 AP 2.7 to 3.6 2.85 to 3.0
-40 to +85 8 Ld SOIC
(150 mil)
MDP0027
X4003S8IZ-2.7A X4003 ZAP X4005S8IZ-2.7A X4005 ZAP
(Note)
(Note)
-40 to +85 8 Ld SOIC
MDP0027
(150 mil) (Pb-free)
X4003M8I-2.7A ACM
X4005M8I-2.7A ACV
-40 to +85 8 Ld MSOP
(3.0mm)
M8.118
X4003M8IZ-2.7A DAC
(Note)
X4005M8IZ-2.7A DAL
(Note)
-40 to +85 8 Ld MSOP
M8.118
(3.0mm) (Pb-free)
X4003S8I-2.7
X4003 G X4005S8I-2.7 X4005 G
2.55 to 2.7
-40 to +85 8 Ld SOIC
(150 mil)
MDP0027
X4003S8IZ-2.7
(Note)
X4003 ZG X4005S8IZ-2.7 X4005 ZG
(Note)
-40 to +85 8 Ld SOIC
MDP0027
(150 mil) (Pb-free)
X4003M8I-2.7 ACO
X4005M8I-2.7 ACX
-40 to +85 8 Ld MSOP
(3.0mm)
M8.118
X4003M8IZ-2.7 DAB
(Note)
X4005M8IZ-2.7 DAK
(Note)
-40 to +85 8 Ld MSOP
M8.118
(3.0mm) (Pb-free)
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
Pin Descriptions
PIN
NUMBER
(MSOP)
NAME
FUNCTION
1
NC
No internal connections
2
NC
No internal connections
3
RESET/RESET Reset Output. RESET/RESET is an active LOW/HIGH, open drain output which goes active whenever V_CC falls below
the minimum V_CC sense level. It will remain active until V_CC rises above the minimum V_CC sense level for 250ms.
RESET/RESET goes active if the watchdog timer is enabled and SDA remains either HIGH or LOW longer than the
selectable Watchdog time out period. A falling edge of SDA, while SCL also toggles from HIGH to LOW followed by a
stop condition resets the watchdog timer. RESET/RESET goes active on power-up and remains active for 250ms after
the power supply stabilizes.
4
V_SS
Ground
5
SDA
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and
may be wire ORed with other open drain or open collector outputs. This pin requires a pull-up resistor and the input buffer
is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA while SCL also toggles from HIGH to LOW follow by a stop
condition resets the watchdog timer. The absence of this procedure within the watchdog time-out period results in
RESET/RESET going active.
6
SCL
Serial Clock. The serial clock controls the serial bus timing for data input and output.
7
WP
Write Protect. WP HIGH prevents changes to the watchdog timer setting.
8
V_CC
Supply voltage
3
FN8113.2
June 30, 2008