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ISL6550A Datasheet, PDF (5/11 Pages) Intersil Corporation – SAM Supervisor And Monitor
ISL6550A, ISL6550C
Absolute Maximum Ratings
Thermal Information
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .3kV
Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .200V
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . . .-40°C to 125°C
Thermal Resistance
θJA (°C/W) θJC (°C/W)
SOIC Package (Typical, Note 1) . . . . .
65
N/A
QFN Package (Typical, Note 2) . . . . . .
35
5
Maximum Junction Temperature (Plastic Package) . .
150
Maximum Storage Temperature Range . . . . . . . . . . . . -65 to 150
Maximum Lead Temperature (Soldering 10s) . . . . . . .
300
(SOIC - Lead Tips Only)
For Recommended soldering conditions see Tech Brief TB389.
.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. θJC, the
“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications TA = 25°C, and VDD = 12V, unless otherwise specified
PARAMETER
SYMBOL
TEST CONDITIONS
SUPPLY CURRENT
Input Current
UNDERVOLTAGE LOCKOUT
IIN
VCC = 12V
VCC UVLO Turn-on Threshold
VCC UVLO Turn-off Threshold
VCC UVLO Threshold Hysteresis
DAC REFERENCE
DAC Output Error (See Notes 3, 4)
Step Size = 25mV
Vdaclo = 0.8V to 4.225V
Ibdac = 0.1mA to -1mA
DAC Output Error (See Notes 3, 4)
Step Size = 50mV
Vdaclo = 0.8V to 3.45V
Ibdac = 0.1mA to -1mA
DAC Output Error (See Notes 3, 4)
Step Size = 100mV
Vdaclo = 0.8V to 1.9V
Ibdac = 0.1mA to -1mA
VREF5 Voltage
VID0-VID4 Input LPUL (Vih)
VID0-VID4 Input MPDL (Vil)
VID0-VID4 Input Pull-Up Current
Vvidx = 0V
VID0-VID4 Input Leakage Current
Vvidx = 5V
Output Settling Time
±1LSB Error Band
UVDLY
Source Current
Sink Current
Threshold
MIN
TYP
MAX
UNITS
-
5
6
mA
9.2
9.4
9.9
-
8.2
8.4
8.9
-
-
1.0
-
-
-2
-
+2
mV
-2
-
+4
mV
-2
-
+6
mV
4.95
-
5.05
V
2.0
-
-
V
-
-
0.8
V
-15
-10
-
mA
-
-
1
µA
-
-
20
µs
-
-10
-
µA
-
10
-
mA
-
5
-
V
5
FN9036.4
January 18, 2005