ISL12028 Datasheet, PDF (5/28 Pages) Intersil Corporation – Real Time Clock/Calendar with EEPROM

ISL12028
Electrical Specifications (Continued)
SYMBOL
PARAMETER
CONDITIONS
IRQ/F_OUT, OUTPUT
V_OH Output High Voltage
V_DD = 5.5V
I_OL = -1.0mA
V_DD = 2.7V
I_OL = -0.4mA
MIN
TYP
MAX
UNIT NOTES
V_DD x 0.7
V
V_DD x 0.7
V
Watchdog Timer/Low Voltage Reset Parameters
SYMBOL
PARAMETER
CONDITIONS
t_RPD
t_PURST
V_RVALID
V_DD Detect to RESET LOW
Power Up Reset Time-Out Delay
Minimum V_DD for Valid RESET
Output
V_RESET ISL12028-4.5A Reset Voltage
Level
ISL12028 Reset Voltage Level
ISL12028-3 Reset Voltage Level
ISL12028-2.7A Reset Voltage
Level
ISL12028-2.7 Reset Voltage Level
t_WDO Watchdog Timer Period
32.768kHz crystal between X1 and
X2
t_RST
Watchdog Timer Reset Time-Out
Delay
t_RSP
I²C Interface Minimum Restart
Time
EEPROM SPECIFICATIONS
EEPROM Endurance
EEPROM Retention
32.768kHz crystal between X1 and
X2
Temperature ≤ +75°C
TYP
MIN
(Note 5)
500
100
250
1.0
4.59
4.64
4.33
4.38
3.04
3.09
2.87
2.92
2.58
2.63
1.70
1.75
725
750
225
250
225
250
1.2
>2,000,000
50
MAX
400
4.69
4.43
3.14
2.97
2.68
1.801
775
275
275
UNITS NOTES
ns
9
ms
V
V
V
V
V
V
s
ms
ms
ms
µs
Cycles
Years
Serial Interface (I²C) Specifications
SYMBOL
PARAMETER
CONDITIONS
V_IL
SDA, and SCL Input Buffer LOW SBIB = 1 (Under V_DD mode)
Voltage
V_IH
SDA, and SCL Input Buffer HIGH SBIB = 1 (Under V_DD mode)
Voltage
Hysteresis SDA and SCL Input Buffer
Hysteresis
SBIB = 1 (Under V_DD mode)
V_OL SDA Output Buffer LOW Voltage
I_LI
Input Leakage Current on SCL
I_LO
I/O Leakage Current on SDA
TIMING CHARACTERISTICS
I_OL = 4mA
V_IN = 5.5V
V_IN = 5.5V
f_SCL SCL Frequency
MIN
TYP
MAX
UNITS NOTES
-0.3
0.3 x V_DD
V
0.7 x V_DD
V_DD + 0.3
V
0.05 x V_DD
V
0
0.4
V
0.1
10
µA
0.1
10
µA
400
kHz
5
FN8233.5
October 18, 2006