IRF840 Datasheet, PDF (5/7 Pages) Motorola, Inc – N-CHANNEL ENHANCEMENT-MODE SILICON GATE TMOS POWER FIELD EFFECT TRANSISTOR

IRF840
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
I_D = 250µA
1.15
3000
2400
1.05
1800
0.95
1200
0.85
600
V_GS = 0V, f = 1MHz
C_ISS = C_GS + C_GD
C_RSS
C_OSS
=
≈
C_GD
C_DS
+
C_GD
C_ISS
C_RSS
C_OSS
0.75
-60 -40 -20 0 20 40 60 80 100 120 140 160
T_J, JUNCTION TEMPERATURE (^oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
0
1
2
5
10
2
5
10²
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
15
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V_DS ≥ 50V
12
9
6
3
T_J = 25^oC
T_J = 150^oC
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
T_J = 150^oC
1.0
T_J = 25^oC
0
0
3
6
9
12
15
I_D, DRAIN CURRENT (A)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
0.1
0
0.3
0.6
0.9
1.2
1.5
V_SD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
I_D = 8A
16
12
8
V_DS = 100V
V_DS = 250V
V_DS = 400V
4
0
0
12
24
36
48
60
Q_g, GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
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