DG401 Datasheet, PDF (5/9 Pages) Intersil Corporation – Monolithic CMOS Analog Switches

DG401, DG403, DG405
Test Circuits and Waveforms (Continued)
SWITCH
OUTPUT
∆V_O
V_O
IN_X ^ON
OFF
ON
R_G
V_G
Q = ∆V_O x C_L
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3. CHARGE INJECTION
5V
V_L
+15V
V+
D₁
GND
V-
0V
-15V
FIGURE 3B. TEST CIRCUIT
V_O
C_L
SIGNAL
GENERATOR
+15V +5V
C V+
V_L C
V_S
IN_X
0V, 2.4V
ANALYZER
R_L
V_D
C
GND
V-
-15V
FIGURE 4. OFF ISOLATION TEST CIRCUIT
SIGNAL
GENERATOR
+15V ^+5V
C V+
V_L C
V_S1
V_D1
50Ω
0V, 2.4V
IN₁
IN₂
0V, 2.4V
ANALYZER
R_L
V_D2
V_S2
NC
C
GND ^V-
-15V
FIGURE 6. CROSSTALK TEST CIRCUIT
SIGNAL
GENERATOR
+15V +5V
C V+
V_L C
V_S
IN_X
0V, 2.4V
ANALYZER
R_L
V_D
C
GND
V-
-15V
FIGURE 5. INSERTION LOSS TEST CIRCUIT
+15V
C V+
+5V
V_L C
IMPEDANCE
ANALYZER
V_S
0V, 2.4V
IN_X ^{AS REQUIRED}
V_D
C
GND
V-
-15V
FIGURE 7. CAPACITANCES TEST CIRCUIT
5