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| DG401 Datasheet, PDF (4/9 Pages) Intersil Corporation – Monolithic CMOS Analog Switches | |||
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DG401, DG403, DG405
Electrical Speciï¬cations Test Conditions: V+ = +15V, V- = -15V, VIN = 2.4V, 0.8V (Note 3), VL = 5V,
Unless Otherwise Speciï¬ed (Continued)
PARAMETER
TEST CONDITIONS
TEMP (NOTE 4) (NOTE 5) (NOTE 4)
(oC)
MIN
TYP
MAX UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 16.5V, V- = -16.5V,
VIN = 0V or 5V
25
-
0.01
1
µA
Full
-
-
5
µA
Negative Supply Current, I-
25
-1
-0.01
-
µA
Full
-5
-
-
µA
Logic Supply Current, IL
25
-
0.01
1
µA
Full
-
-
5
µA
Ground Current, IGND
25
-1
-0.01
-
µA
Full
-5
-
-
µA
NOTES:
3. VIN = input voltage to perform proper function.
4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Test Circuits and Waveforms
3V
LOGIC
INPUT
0V
SWITCH
INPUT
VS
SWITCH
OUTPUT 0V
SWITCH
INPUT
(NOTE 7)
-VS
50%
tOFF
VO
90%
tON
tr < 20ns
tf < 20ns
90%
10%
NOTES:
6. Logic input waveform is inverted for switches that have the
opposite logic sense.
7. VS = 10V for tON, VS = -10V for tOFF.
FIGURE 1A. MEASUREMENT POINTS
SWITCH
INPUT
S1
IN1
LOGIC
INPUT
5V
VL
+15V
V+
RL = 300â¦
CL = 35pF
D1
VO
GND
RL
CL
V-
0V
-15V
Repeat test for IN2 and S2.
For load conditions, see Specifications. CL includes fixture and stray
capacitance.
VO = VS -R----L-----+----r-R--D---L-S----(--O----N-----)
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
3V
LOGIC
INPUT
0V
VS1
SWITCH
OUTPUT
(VO1) 0V
VS2
SWITCH
OUTPUT
(VO2) 0V
90%
tD
90%
tD
VS1 = 10V
VS2 = 10V
IN1
LOGIC
INPUT
5V
VL
+15V
V+
RL = 300â¦
CL = 35pF
D1
VO1
D2 VO2 RL1
CL1
GND
RL2
CL2
V-
0V
-15V
CL includes fixture and stray capacitance.
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. BREAK-BEFORE-MAKE TIME
4
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