X9259 Datasheet, PDF (4/21 Pages) Xicor Inc. – Quad Digitally-Controlled (XDCP) Potentiometers

X9259
Pin Descriptions
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for a 2-
Wire slave device and is used to transfer data into and out of
the device. It receives device address, opcode, wiper
register address and data sent from a 2-Wire master at the
rising edge of the serial clock SCL, and it shifts out data after
each falling edge of the serial clock SCL.
It is an open drain output and may be wire-ORed with any
number of open drain or open collector outputs. An open
drain output requires the use of a pull-up resistor.
SERIAL CLOCK (SCL)
This input is used by 2-Wire master to supply 2-Wire serial
clock to the X9259.
DEVICE ADDRESS (A3 – A0)
The Address inputs are used to set the least significant 4 bits
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the Address input in
order to initiate communication with the X9259. A maximum
of 16 devices may occupy the 2-Wire serial bus. Device pins
A3-A0 must be tie to a logic level which specify the external
address of the device, see Figures 3, 4, and 5.
Potentiometer Pins
R_H, R_L
The R_H and R_L pins are equivalent to the terminal
connections on a mechanical potentiometer. Since there are
4 potentiometers, there are 4 sets of R_H and R_L such that
R_H0 and R_L0 are the terminals of DCP0 and so on.
R_W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4 potentiometers,
there are 4 sets of R_W such that R_W0 is the terminal of
DCP0 and so on.
Bias Supply Pins
SYSTEM SUPPLY VOLTAGE (V_CC) AND SUPPLY
GROUND (V_SS)
The V_CC pin is the system supply voltage. The V_SS pin is
the system ground.
Other Pins
NO CONNECT
No connect pins should be left open. This pins are used for
Intersil manufacturing and testing purposes.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents non-volatile writes to the
Data Registers.
One of Four Potentiometers
#: 0, 1, 2, or 3
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
DR#0
8
DR#2
R_H
SERIAL
BUS
INPUT
DR#1
8
PARALLEL
BUS
DR#3
INPUT
WIPER
COUNTER
---
DCP
CORE
R_W
DECODE
COUNTER
REGISTER
(WCR#)
IF WCR = 00[H] then R_W is closest to R_L
IF WCR = FF[H] then R_W is closest to R_H
UP/DN
INC/DEC
LOGIC
UP/DN
MODIFIED SCK
CLK
R_L
FIGURE 1. DETAILED POTENTIOMETER BLOCK DIAGRAM
4
FN8169.2
September 16, 2005