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| X5648 Datasheet, PDF (4/18 Pages) Intersil Corporation – CPU Supervisor with 64Kbit SPI EEPROM | |||
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X5648, X5649
Figure 3. VTRIP Programming Sequence Flow Chart
VTRIP Programming
Execute
Reset VTRIP
Sequence
Set VCC = VCC Applied =
Desired VTRIP
New VCC Applied =
Old VCC Applied + Error
Execute
Set VTRIP
Sequence
Apply 5V to VCC
Decrement VCC
(VCC = VCC - 10mV)
New VCC Applied =
Old VCC Applied - Error
Execute
Reset VTRIP
Sequence
NO
RESET pin
goes active?
YES
Error ⥠Emax
Emax = Maximum Desired Error
Measured VTRIP -
Desired VTRIP
Error > Emax
Error < Emax
DONE
4
FN8136.0
March 17, 2005
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