ISL78010 Datasheet, PDF (4/18 Pages) Intersil Corporation – Automotive Grade TFT-LCD Power Supply

ISL78010
Pin Descriptions
PIN NAME
1, 2, 4, 6, 8, 10, 12,
16, 18, 23, 32
3
5
9
7
11
13
14, 27
15
17
19, 20, 21, 22
24
25
PIN NUMBER
NC
DELB
LX
FBP
DRVP
DRVL
FBL
SGND
DRVN
FBN
PGND
VREF
CINT
26
FBB
28
EN
29
VDD
30
PG
31
CDLY
Not connected
DESCRIPTION
Open drain output for gate drive of optional V_BOOST delay FET
Drain of the internal N-Channel boost FET
Positive LDO voltage feedback input pin; regulates to 1.2V nominal
Positive LDO base drive; open drain of an internal N-Channel FET
Logic LDO base drive; open drain of an internal N-Channel FET
Logic LDO voltage feedback input pin; regulates to 1.2V nominal
Low noise signal ground
Negative LDO base drive; open drain of an internal P-Channel FET
Negative LDO voltage feedback input pin; regulates to 0.2V nominal
Power ground, connected to source of internal N-Channel boost FET
Bandgap reference output voltage; bypass with a 0.1µF to SGND
V_BOOST integrator output; connect capacitor to SGND for PI-mode or connect to V_DD for P-mode
operation
Boost regulator voltage feedback input pin; regulates to 1.2V nominal
Enable pin; High = Enable; Low or floating = Disable
Positive supply
Push-pull gate drive of optional fault protection FET; when chip is disabled or when a fault has been
detected, this is high
A capacitor connected from this pin to SGND sets the delay time for start-up sequence and sets the fault
timeout time
Typical Performance Curves T_A = +25°C, unless otherwise specified.
100
100
A_VDD = 9V
80
80
A_VDD = 12V
60
A_VDD = 15V
60
40
40
A_VDD = 15V ^{AVDD = 12V}
A_VDD = 9V
20
20
0
0
100
200
300
400
I_OUT (mA)
FIGURE 1. V_BOOST EFFICIENCY AT V_IN = 3V (PI-MODE)
0
0
200
400
600
800
I_OUT (mA)
FIGURE 2. V_BOOST EFFICIENCY AT V_IN = 5V (PI-MODE)
4
FN6501.0
May 30, 2007