ISL76161 Datasheet, PDF (4/12 Pages) Intersil Corporation – 12-Bit, +3.3V, 130MSPS, High Speed D/A Converter

ISL76161
Absolute Maximum Ratings
Digital Supply Voltage DV_DD to DCOM . . . . . . . . . . . . . . . . . +4.0V
Analog Supply Voltage AV_DD to ACOM. . . . . . . . . . . . . . . . . . +4.0V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D9-D0, CLK, SLEEP). . . . . . . . DV_DD + 0.3V
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AV_DD + 0.3V
Analog Output Current (I_OUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Thermal Information
Thermal Resistance (Typical, Note 3)
θ_JA(°C/W)
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
84
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
3. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
AV_DD = DV_DD = +3.3V, V_REF = Internal 1.2V, IOUTFS = 20mA, T_A = +25°C for All Typical Values; Parameters
with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
PARAMETER
TEST CONDITIONS
T_A = -40°C TO +105°C
MIN TYP MAX
UNITS
SYSTEM PERFORMANCE
Resolution
12
-
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 9)
-1.25 ±0.5 +1.25 LSB
Differential Linearity Error, DNL
(Note 9)
-1
±0.5
+1
LSB
Offset Error, I_OS
Offset Drift Coefficient
IOUTA (Note 9)
(Note 9)
-0.006 - +0.006 % FSR
-
0.1
-
ppm
FSR/°C
Full Scale Gain Error, FSE
With External Reference (Notes 4, 9)
-
±0.5
-
% FSR
With Internal Reference (Notes 4, 9)
-3
±0.5
+3 % FSR
Full Scale Gain Drift
With External Reference (Note 9)
-
±50
-
ppm
FSR/°C
With Internal Reference (Note 9)
-
±100
-
ppm
FSR/°C
Full Scale Output Current, I_FS
Output Voltage Compliance - High
Voltage Limit
R_SET = 1.94kΩ (Maximum FS output)
R_SET = 20kΩ (Minimum FS output)
-
20
-
mA
-
2
-
mA
-
1.25
-
V
Output Voltage Compliance - Low
Voltage Limit
-
-1.0
-
V
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, f_CLK
Output Rise Time
Full Scale Step
130 150
-
-
1.5
-
MHz
ns
Output Fall Time
Full Scale Step
-
1.5
-
ns
Output Capacitance
-
10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/ √Hz
IOUTFS = 2mA
-
30
-
pA/ √Hz
4
FN6720.1
September 9, 2008