ISL6296_07 Datasheet, PDF (4/19 Pages) Intersil Corporation – FlexiHash™ For Battery Authentication

ISL6296
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T_A = -20°C to +85°C; V_DD = 2.6V to 4.8V. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Device Wake-Up Time
T_WKE From falling-edge of break command issued by host to 35
60
100
μs
falling-edge of break command returned by device
Device Sleep Wait Time
T_SLP From when the ‘11’ Opcode is detected to the shut-off
4
-
-
μs
of the internal regulator
Auto-Sleep Time-Out Period
T_ASLP From the last transition detected on the XSD bus to the 0.9
-
1.1
s
device going into sleep mode
OTP ROM Write Time
T_EEW From the last BT of the 2nd write data frame to when
-
device is ready to accept the next instruction
1.8
1.9
ms
Hash Calculation Time
T_HASH From the last BT of the Challenge Code Word from the -
1
-
BT
host to the Authentication Code being available for read
Soft-Reset Time
T_SRST From the last BT of the Soft-Reset instruction issued by -
the host to the falling-edge of break command returned
by device
-
30
μs
AC CHARACTERISTICS
Oscillator Clock Frequency
Charge Pump Clock Frequency
f_OSC Internal bus reference clock
505 532 560 kHz
f_CP Internal high speed clock (observable only in test mode)
Low-speed mode
3.6
5
6
MHz
High-speed mode
16
20
24
MHz
Pin Descriptions
PIN NUMBER
1
2
3
4
5
PIN NAME
VSS
NC
VDD
TIO
XSD
DESCRIPTION
System ground.
No connection.
Supply voltage.
Production test I/O pin. Used only during production testing. Must be left floating during normal operation.
Communication bus with weak internal pull-down to VSS. This pin is a Schmitt-trigger input and an open-drain
output. An appropriate pull-up resistor is required on the host side.
4
FN9201.1
January 17, 2007