ISL267817_14 Datasheet, PDF (4/18 Pages) Intersil Corporation – 12-Bit Differential Input 200kSPS SAR ADC

ISL267817
Absolute Maximum Ratings
Any Pin to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Analog Input to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +VCC+0.3V
Digital I/O to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +VCC+0.3V
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . . . . .-0.3V to +VCC+0.3V
Maximum Current In to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
ESD Rating
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 8kV
Machine Model (Tested per JESD22-A115B) . . . . . . . . . . . . . . . . . 400V
Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . 1.5kV
Latch Up (Tested per JESD78C; Class 2, Level A) . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θ_JA (°C/W) θ_JC (°C/W)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . . 120
64
8 Ld MSOP Package (Notes 4, 5). . . . . . . . . 165
64
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θ_JC, the “case temp” location is taken at the package top center.
Electrical Specifications +VCC = +5V, f_DCLOCK = 3.2MHz, f_S = 200kSPS, V_REF = 2.5V; V_CM = V_REF, Typical values are at T_A = +25°C.
Boldface limits apply over the operating temperature range, -40°C to +85°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6)
UNITS
ANALOG INPUT (Note 7)
|AIN| Full-Scale Input Span
+IN – (–IN)
-VREF
+VREF
V
Absolute Input Voltage
+IN
-0.3
+VCC +0.3
V
–IN
-0.3
+VCC +0.3
V
C_VIN Input Capacitance
I_LEAK Input DC Leakage Current
SYSTEM PERFORMANCE
Sample/Hold Mode
13/6
pF
-1 0.01
1
µA
N
Resolution
12
Bits
No Missing Codes
12
Bits
INL Integral Nonlinearity
-1 ±0.5
1
LSB
DNL Differential Nonlinearity
-1 ±0.4
1
LSB
OFFSET Zero-Code Error
-6 ±0.25
6
LSB
GAIN Gain Error
-4 ±0.12
4
LSB
CMRR Common-Mode Rejection
80
dB
PSRR Power Supply Rejection
82
dB
SAMPLING DYNAMICS
t_CONV Conversion Time
t_ACQ Acquisition Time
f_max Throughput Rate
DYNAMIC CHARACTERISTICS
f_DCLOCK = 3.2MHz
12
Clk Cycles
1.5
Clk Cycles
200
kSPS
THD Total Harmonic Distortion
SINAD
SFDR
BW
Signal-to (Noise + Distortion) Ratio
Spurious Free Dynamic Range
Full Power Bandwidth
V_IN = 5.0V_P-P at f_IN = 1kHz
V_IN = 5.0V_P-P at f_IN = 5kHz
V_IN = 5.0V_P-P at f_IN = 1kHz
V_IN = 5.0V_P-P at f_IN = 1kHz
At –3dB
-85
dB
-84
dB
71
dB
85
dB
15
MHz
4
FN7877.2
April 19, 2012