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| ICL7129 Datasheet, PDF (4/11 Pages) Intersil Corporation – 41/2 Digit LCD, Single-Chip A/D Converter | |||
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ICL7129
Pin Descriptions
PIN
SYMBOL
DESCRIPTION
PIN
1
OSC1
Input to ï¬rst clock inverter.
23
2
OSC3
Output of second clock inverter.
24
3
ANNUNCIATOR Backplane squarewave output for
DRIVE
driving annunciators.
25
4
B1, C1, CONT Output to display segments.
26
5
A1, G1, D1 Output to display segments.
27
6
F1, E1, DP1 Output to display segments.
7
B2, C2, LO BATT Output to display segments.
8
A2, G2, D2 Output to display segments.
9
F2, E2, DP2 Output to display segments.
28
10
B3, C3, MINUS Output to display segments.
11
A3, G3, D3 Output to display segments.
12
F3, E3, DP3 Output to display segments.
29
13
B4, C4, BC5 Output to display segments.
30
14
A4, D4, G4 Output to display segments.
15
F4, E4, DP4 Output to display segments.
31
16
BP3
Backplane #3 output to display.
32
17
BP2
Backplane #2 output to display.
33
18
BP1
Backplane #1 output to display.
34
19
VDlSP
Negative rail for display drivers.
35
20
DP4 / OR
INPUT: When HI, turns on most
signiï¬cant decimal point.
36
OUTPUT: Pulled HI when result
count exceeds ±19,999.
37
21
DP3 / UR
INPUT: Second most signiï¬cant
decimal point on when HI.
38
OUTPUT: Pulled HI when result
count is less than ±1,000.
39
22
LATCH/HOLD INPUT: When ï¬oating, A/D converter
operates in the free-run mode. When
40
pulled HI, the last displayed reading is
held. When pulled LO, the result
counter contents are shown
incrementing during the de-integrate
phase of cycle.
OUTPUT: Negative going edge
occurs when the data latches are
updated. Can be used for converter
status signal.
SYMBOL
DESCRIPTION
V-
Negative power supply terminal.
V+
Positive power supply terminal, and
positive rail for display drivers.
INT IN
Input to integrator ampliï¬er.
INT OUT
Output of integrator ampliï¬er.
CONTINUITY
INPUT: When LO, continuity ï¬ag on
the display is off. When HI,
continuity ï¬ag is on.
OUTPUT: HI when voltage between
inputs is less than +200mV. LO
when voltage between inputs is
more than +200mV.
COMMON
Sets common-mode voltage of 3.2V
below V+ for DE, 10X, etc., Can be
used as pre-regulator for external
reference.
CREF+
Positive side of external reference
capacitor.
CREF-
Negative side of external reference
capacitor.
BUFFER
Output of buffer ampliï¬er.
IN LO
Negative input voltage terminal.
IN HI
Positive input voltage terminal.
REF HI
Positive reference voltage input
terminal.
REF LO
Negative reference voltage input
terminal.
DGND
Ground reference for digital section.
RANGE
3µA pull-down for 200mV scale.
Pulled HIGH externally for 2V scale.
DP2
Internal 3µA pull-down. When HI,
decimal point 2 will be on.
DP1
Internal 3µA pull-down. When HI,
decimal point 1 will be on.
OSC2
Output of ï¬rst clock inverter. Input of
second clock inverter.
3-34
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