ICL7129 Datasheet, PDF (10/11 Pages) Intersil Corporation – 41/2 Digit LCD, Single-Chip A/D Converter

ICL7129
A single polarity power supply can be used to power the
ICL7129 in applications where battery operation is not
appropriate or convenient only if the power supply is isolated
from system ground. Measurements must be made with
respect to COMMON or some other voltage within its input
common-mode range.
Voltage References
The COMMON output of the ICL7129 has a temperature
coefficient of ±80ppm/^oC typically. This voltage is only suit-
able as a reference voltage for applications where ambient
temperature variations are expected to be minimal. When
the ICL7129 is used in most environments, other voltage ref-
erences should be considered. The diagram in the Typical
Application Schematic and Figure 15 show the ICL8069
1.2V band-gap voltage source used as the reference for the
ICL7129, and the COMMON output as its pre-regulator. The
reference voltage for the ICL7129 is set to 1.000V for both
2V and 200mV full-scale operation.
Multiple Integration A/D Converter
Equations
Oscillator Frequency
f_OSC = 0.45/RC
C_OSC > 50pF; R_OSC > 50kΩ
f_OSC (Typ) = 120kHz
or
f_OSC = 120kHz Crystal (Recommended)
Oscillator Period
t_OSC = 1/f_OSC
Integration Clock Period
t_CLOCK = 2*t_OSC
Integration Period
t_INT(2V) = 1000*t_CLOCK
(Range = 1)
t_INT(200mV) = 10,000*t_CLOCK (Range = 0)
60/50Hz Rejection Criterion
t_INT/t_60Hz or t_INT/t_50Hz = Integer
Optimum Integration Current
I_INT = 13µA
Full Scale Analog Input Voltage
V_INFS (Typ) = 200mV or 2V
Integrate Resistor
R_INT = V_INFS/I_INT
R_INT (Typ) = 150kΩ
Integrate Capacitor
CINT = ⁽---^t--^I--^N----_V-^T---_I-⁾-_N-⁽---^I-_T-^I--^N----^T-----⁾
Integrator Output Voltage Swing
VINT = -⁽--^t--^I--^N---_C--^T---_I-⁾-_N-⁽---^I-_T-^I--^N----^T-----⁾
V_INT Maximum Swing:
(V- + 0.5V) < V_INT < (V+ - 0.7V)
Display Count
COUNT = 10,
(2V Range)
000
×
V^----V-_R^---I--_EN^----_F^{-- (Range}
=
1)
COUNT = 10, 000
(200mV Range)
×
V_{----V-I--N-R-----}×_E----F1----0_{-- (Range}
=
0)
Minimum V_REF: 500mV
Common Mode Input Voltage
(V- + 1V) < V_IN < (V+ - 0.5V)
Auto Zero Capacitor: C_AZ not used
Reference Capacitor: 0.1µF < C_REF < 1µF
V_COM
Biased Between V+ and V-.
V_COM ≅ V+ -2.9V
Regulation lost when V+ to V- < ≅ 6.4V.
If V_COM is externally pulled down to (V+ to V-)/2, the
V_COM circuit will turn off.
Power Supply: Single 9V
V+ - V- = 9V
Digital supply is generated internally
V_GND ≅ V+ - 4.5V
Display: Triplexed LCD
Continuity Output On if
V_INHI to V_INLO < 200mV
Conversion Cycle (In Both Ranges)
t_CYC = t_CLOCK x 30,000
ZERO-INTEGRATE
AND LATCH
INT₁
INTEGRATE
DE₁
DE-INTEGRATE REST X10 DE₂ REST X10 DE₃ ZERO-INTEGRATE
NOTE: Shaded area greatly expanded
in time and amplitude.
1000 CLOCKS
10,000 CLOCKS
2000
CLOCKS
INTEGRATOR
RESIDUE
VOLTAGE
1000 CLOCKS
3-40