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82C83H Datasheet, PDF (4/6 Pages) Intersil Corporation – CMOS Octal Latching Inverting Bus Driver
82C83H
AC Electrical Specifications VCC = 5.0V ±10%; CL = 300pF (Note 1), FREQ = 1MHz
TA = 0oC to +70oC (C82C83H);
TA = -40oC to +85oC (l82C83H);
TA = -55oC to +125oC (M82C83H)
LIMITS
SYMBOL
PARAMETER
MIN
MAX
UNITS
(1) TlVOV
Propagation Delay Input to Output
5
25
ns
(2) TSHOV
Propagation Delay STB to Output
10
50
ns
(3) TEHOZ
Output Disable Time
5
22
ns
(4) TELOV
Output Enable Time
10
45
ns
(5) TlVSL
Input to STB Set Up Time
0
-
ns
(6) TSLIX
Input to STB Hold Time
30
-
ns
(7) TSHSL
STB High Time
15
-
ns
(8) TR, TF
Input Rise/Fall Times
-
20
ns
NOTES:
1. Output load capacitance is rated 300pF for both ceramic and plastic packages.
2. All AC Parameters tested as per test load circuits. Input rise and tall times are driven at 1ns/V.
3. Input test signals must switch between VIL -0.4V and VlH +0.4V.
TEST CONDITIONS
See Notes 2, 3
See Notes 2, 3
See Notes 2, 3
See Notes 2, 3
See Notes 2, 3
See Notes 2, 3
See Notes 2, 3
See Notes 2, 3
Timing Waveforms
INPUTS
STB
2.0V
0.8V
TR, TF (8)
TIVSL (5)
TSLIX
(6)
TSHSL (7)
OE
OUTPUTS
TIVOV
(1)
TSHOV (2)
TEHOZ (3)
VOH -0.1V
VOL +0.1V
All Timing measurements are made at 1.5V unless otherwise noted.
FIGURE 4. TIMING WAVEFORMS
Test Load Circuits
2.27V
OUTPUT
91Ω
TEST
POINT
300pF
(SEE NOTE)
OUTPUT
TELOV (4)
3.0V
0.45V
1.5V
180Ω
TEST
POINT
300pF
(SEE NOTE)
FIGURE 5. TIVOV, TSHOV
FIGURE 6. TELOV OUTPUT HIGH ENABLE
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