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82C83H Datasheet, PDF (3/6 Pages) Intersil Corporation – CMOS Octal Latching Inverting Bus Driver
82C83H
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND 0.5V to VCC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range
C82C83H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC
I82C83H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
M82C83H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Thermal Resistance (Typical)
θJAoC/W θJCoC/W
CERDIP Package . . . . . . . . . . . . . . . .
70
16
CLCC Package . . . . . . . . . . . . . . . . . .
80
20
PDIP Package . . . . . . . . . . . . . . . . . . .
75
N/A
PLCC Package . . . . . . . . . . . . . . . . . .
75
N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65oC to +150oC
Max Junction Temperature Ceramic Package . . . . . . . . . . . . . . +175oC
Max Junction Temperature Plastic Package. . . . . . . . . . . . . . . . +150oC
Lead Temperature (Soldering 10s) (PLCC - Lead Tips Only) . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications VCC = 5.0V ± 10%; TA = 0oC to +70oC (C82C83H);
TA = -40oC to +85oC (I82C83H);
TA = -55oC to +125oC (M82C83H)
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
VIH
Logical One Input Voltage
2.0
-
2.2
V
C82C83H, I82C83H,
M82C83H, (Note 1)
VIL
VOH
VOL
II
Logical Zero Input Voltage
Logical One Output Voltage
Logical Zero Output Voltage
Input Leakage Current
0.8
3.0
-
VCC -0.4V
0.45
-10
10
V
V
IOH = -8mA,
IOH = -100mA, OE = GND
V
IOL = 20mA, OE = GND
µA
VIN = GND or VCC,
DIP Pins 1-9,11
IO
Output Leakage Current
-10
10
µA
VO = GND or OE ≥ VCC -0.5V
DIP Pins 12-19
lCCSB
Standby Power Supply Current
-
IC COP Operating Power Supply Current
-
10
µA
VIN = VCC or GND
VCC = 5.5V Outputs Open
1
mA/
TA = +25oC, VCC = 5V, Typical
MHz
(See Note 2)
NOTES:
1. VIH is measured by applying a pulse of magnitude = VlHMIN to one data Input at a time and checking the corresponding device output for
a valid logical 1 - during valid input high time. Control pins (STB, CE) are tested separately with all device data input pins at VCC -0.4V.
2. Typical ICCOP = 1 mA/MHz of STB cycle time. (Example: 5MHz µP, ALE = 1.25MHz, ICCOP = 1.25mA).
Capacitance TA = +25oC
SYMBOL
PARAMETER
CIN
COUT
Input Capacitance
Output Capacitance
TYPICAL
13
20
UNITS
pF
pF
TEST CONDITIONS
FREQ = 1MHz, all measure-
ments are referenced to device
GND
4-283