ISL6366 Datasheet, PDF (36/44 Pages) Intersil Corporation – Dual 6-Phase + 1-Phase PWM Controller for VR12/IMVP7 Applications

ISL6366
Thus the total maximum power dissipated in each lower MOSFET
is approximated by the summation of P_LOW,1, P_LOW,2 and
P_LOW,3.
Upper MOSFET Power Calculation
In addition to r_DS(ON) losses, a large portion of the upper-MOSFET
losses are due to currents conducted across the input voltage (V_IN)
during switching. Since a substantially higher portion of the
upper-MOSFET losses are dependent on switching frequency, the
power calculation is more complex. Upper MOSFET losses can be
divided into separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-recovery
charge, Q_rr; and the upper MOSFET r_DS(ON) conduction loss.
When the upper MOSFET turns off, the lower MOSFET does not
conduct any portion of the inductor current until the voltage at
the phase node falls below ground. Once the lower MOSFET
begins conducting, the current in the upper MOSFET falls to zero
as the current in the lower MOSFET ramps up to assume the full
inductor current. In Equation 34, the required time for this
commutation is t₁ and the approximated associated power loss
is P_UP,1.
P _{U P,1}
≈
V_IN
⎛
⎝
-I-^M---
N
+
I--_{P-2---P--⎠⎞}
⎛
⎜
⎝
t--_1--
⎞
⎟
2_⎠
F_SW
(EQ. 34)
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t₂. In Equation 35, the approximate
power loss is P_UP,2.
P _{U P,}
2
≈
V_I
N
⎛
⎜
⎝
-I-^M---
N
–
-I-^P--2--^P--_{⎠⎟⎞}
⎛
⎜
⎝
t--_2--
2
⎞
⎟
⎠
F_S
W
(EQ. 35)
A third component involves the lower MOSFET’s reverse-recovery
charge, Q_rr. Since the inductor current has fully commutated to the
upper MOSFET before the lower-MOSFET’s body diode can draw all
of Q_rr, it is conducted through the upper MOSFET across VIN. The
power dissipated as a result is P_UP,3 and is approximated in
Equation 36:
P_UP,3 = V_IN Q_rrF_SW
(EQ. 36)
The resistive part of the upper MOSFET’s is given in Equation 37
as P_UP,4.
P_UP,4 ≈ r_DS(ON)
⎛
⎜
⎝
-I-^M---⎟⎞
N⎠
2
+
-I-^P----^P--²-
12
⋅d
(EQ. 37)
Equation 38 accounts for some power loss due to the drain-
source parasitic inductance (L_DS, including PCB parasitic
inductance) of the upper MOSFETs, although it is not the exact:
2
P _{U P,5}
≈
L_DS
⎛
⎜
⎝
I--_M---
N
+
I--_{P----P--⎟⎞}
2_⎠
(EQ. 38)
Finally, the power loss of output capacitance of the upper
MOSFET is approximated in Equation 39:
P_U
P,6
≈
2_--
3
⋅
V_I1N.5
⋅
C _{O S S _UP}
⋅
V_{DS_UP} ⋅ F_SW
(EQ. 39)
where C_{OSS_UP} is the output capacitance of lower MOSFET at
test voltage of V_{DS_UP}. Depending on the amount of ringing, the
actual power dissipation will be slightly higher than this.
The total power dissipated by the upper MOSFET at full load can
now be approximated as the summation of the results from
Equations 34 to 39. Since the power equations depend on
MOSFET parameters, choosing the correct MOSFETs can be an
iterative process involving repetitive solutions to the loss
equations for different MOSFETs and different switching
frequencies.
Current Sensing Resistor
The resistors connected to the ISEN+ pins determine the gains in
the load-line regulation loop and the channel-current balance
loop as well as setting the overcurrent trip point. Select values for
these resistors by using Equation 40:
R_ISEN
=
1^----0^----0^---R--×^--X1----0---^–---6--
-I-^O----^C----^P-
N
(EQ. 40)
where R_ISEN is the sense resistor connected to the ISEN+ pin, N
is the active channel number, R_X is the resistance of the current
sense element, either the DCR of the inductor or R_SENSE
depending on the sensing method, and I_OCP is the desired
overcurrent trip point. Typically, I_OCP can be chosen to be 1.2
times the maximum load current of the specific application.
With integrated temperature compensation, the sensed current
signal is independent of the operational temperature of the
power stage, i.e. the temperature effect on the current sense
element R_X is cancelled by the integrated temperature
compensation function. R_X in Equation 40 should be the
resistance of the current sense element at the room
temperature.
When the integrated temperature compensation function is
disabled by selecting “OFF” TCOMP code, the sensed current will
be dependent on the operational temperature of the power
stage, since the DC resistance of the current sense element may
be changed according to the operational temperature. R_X in
Equation 40 should be the maximum DC resistance of the
current sense element at the all operational temperature.
In certain circumstances, especially for a design with an
unsymmetrical layout, it may be necessary to adjust the value of
one or more ISEN resistors for VR0. When the components of one
or more channels are inhibited from effectively dissipating their
heat so that the affected channels run cooler than the average,
choose new, larger values of R_ISEN for the affected phases (see
the section entitled “Current Sensing” on page 17). Choose
R_ISEN,2 in proportion to the desired increase in temperature rise
in order to cause proportionally more current to flow in the cooler
phase, as shown in Equation 41:
R_ISEN,2 = R_ISEN ^ΔΔ-----TT----²¹-
(EQ. 41)
ΔR_ISEN = R_ISEN,2 – R_ISEN
In Equation 41, make sure that ΔT₂ is the desired temperature rise
above the ambient temperature, and ΔT₁ is the measured
temperature rise above the ambient temperature. Since all
channels’ R_ISEN are integrated and set by one RSET, a resistor
(ΔR_ISEN) should be in series with the cooler channel’s ISEN+ pin
to raise this phase current. While a single adjustment according to
Equation 41 is usually sufficient, it may occasionally be necessary
36
FN6964.0
January 3, 2011