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X9241A_07 Datasheet, PDF (3/16 Pages) Intersil Corporation – Quad Digital Controlled Potentionmeters (XDCP™)
X9241A
Ordering Information (Continued)
PART NUMBER
VCC LIMITS
PART MARKING
(V)
POTENTIOMETER
ORGANIZATION
(k)
TEMP RANGE
(°C)
PACKAGE
X9241AUP
X9241AUP
5 ±10%
50
0 to +70
20 Ld PDIP
X9241AUPZ (Note)
X9241AUPI
X9241AUPIZ (Note)
X9241AUS
X9241AUSZ* (Note)
X9241AUSI*, **
X9241AUPZ
X9241AUPI
X9241AUPIZ
X9241AUS
X9241AUS Z
X9241AUSI
Pot 0 = 50k
Pot 1 = 50k
Pot 2 = 50k
Pot 3 = 50k
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
20 Ld PDIP*** (Pb-free)
20 Ld PDIP
20 Ld PDIP*** (Pb-free)
20 Ld SOIC
20 Ld SOIC (Pb-free)
20 Ld SOIC
X9241AUSIZ* (Note)
X9241AUSI Z
-40 to +85 20 Ld SOIC (Pb-free)
X9241AUV*
X9241AU V
0 to +70
20 Ld TSSOP
X9241AUVZ* (Note)
X9241AUVI*, **
X9241AU VZ
X9241AU VI
0 to +70
-40 to +85
20 Ld TSSOP (Pb-free)
20 Ld TSSOP
X9241AUVIZ* (Note)
X9241AU VIZ
-40 to +85 20 Ld TSSOP (Pb-free)
*Add "T1" suffix for tape and reel.
**Add “T2” suffix for tape and reel.
***Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
Pin Descriptions
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9241A.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and out
of the device. It is an open drain output and may be wire-
ORed with any number of open drain or open collector
outputs. An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the guidelines
for calculating typical values on the bus pull-up resistors
graph.
Address
The Address inputs are used to set the least significant
4-bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the Address
input in order to initiate communication with the X9241A.
Potentiometer Pins
VH/RH(VH0/RH0 TO VH3/RH3), VL/RL (VL0/RL0 TO VL3/RL3)
The RH and RL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW/RW (VW0/RW0 TO VW3/RW3)
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
Pinout
X9241A
(20 LD DIP, SOIC, TSSOP)
TOP VIEW
VW0/RW0
VL0/RL0
VH0/RH0
A0
A2
VW1/RW1
VL1/RL1
VH1/RH1
SDA
VSS
1
20
2
19
3
18
4
17
5
16
X9241A
6
15
7
14
8
13
9
12
10
11
VCC
VW3/RW3
VL3/RL3
VH3/RH3
A1
A3
SCL
VW2/RW2
VL2/RL2
VH2/RH2
Pin Names
SYMBOL
DESCRIPTION
SCL
Serial Clock
SDA
Serial Data
A0 to A3
Address
VH0/RH0 to VH3/RH3,
VL0/RL0 to VL3/RL3
VW0/RW0 to VW3/RW3
Potentiometer Pins (terminal equivalent)
Potentiometer Pins (wiper equivalent)
3
FN8164.6
August 31, 2007