ISL6556A Datasheet, PDF (3/24 Pages) Intersil Corporation – Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application

ISL6565ACR Block Diagram
ISL6556A
RGND
VSEN
VDIFF PGOOD
OVP
S ^{OVP R}
x1
LATCH
Q
VCC
POWER-ON
RESET (POR)
ENLL
1.24V
EN
OVP
+200mV
SOFT START
AND
FAULT LOGIC
CLOCK AND
SAWTOOTH
GENERATOR
∑
PWM
THREE-STATE
FS
PWM1
OFS
OFSOUT
REF
DAC
VID4
VID3
VID2
VID1
VID0
VID12.5
COMP
FB
OFFSET
DYNAMIC
VID
D/A
∑Â
PWM
PWM2
∑
PWM
PWM3
+
E/A
-
∑
PWM
CHANNEL
CURRENT
BALANCE
I_TRIP
OC
∑
I_TOT
CHANNEL
DETECT
SAMPLE
&
HOLD
PWM4
CHANNEL
CURRENT
SENSE
ISEN1
ISEN2
ISEN3
ISEN4
GND
3