ISL6556A Datasheet, PDF (14/24 Pages) Intersil Corporation – Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application

ISL6556A
Load-Line Regulation
Some microprocessor manufacturers require a precisely-
controlled output resistance. This dependence of output
voltage on load current is often termed “droop” or “load line”
regulation. By adding a well controlled output impedance,
the output voltage can be level in the direction that works to
control the voltage spike coincident with fast load current
demand changes.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
As shown in Figure 5, a current proportional to the average
current in all active channels, I_AVG, flows from FB through a
load-line regulation resistor, R_FB. The resulting voltage drop
across R_FB is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined as:
V_DROOP = I_AVG R_FB
(EQ. 5)
In most cases, each channel uses the same R_ISEN value to
sense current. A more complete expression for V_DROOP is
derived by combining Equations 4 and 5.
V_DROOP
=
-I-^O-----^U----^T--
N
r---_{D----S----(--O----N-----)}
R_ISEN
R_FB
(EQ. 6)
Output-Voltage Offset Programming
The ISL6556A allows the designer to accurately adjust the
offset voltage. When a resistor, R_OFS, is connected between
OFS and VCC, the voltage across it is regulated to 2.0V.
This causes a proportional current (I_OFS) to flow into OFS. If
R_OFS is connected to ground, the voltage across it is
regulated to 0.5V, and I_OFS flows out of OFS. A resistor
between DAC and REF, R_REF, is selected so that the
product (I_OFS x R_REF) is equal to the desired offset voltage.
These functions are shown in Figures 6 and 7.
As evident in Figure 7, the OFSOUT pin must be connected
to the REF pin for this current injection to function in
ISL6556ACR. The current flowing through R_REF creates an
offset at the REF pin, which is ultimately duplicated at the
output of the regulator.
Once the desired output offset voltage has been determined,
use the following formulae to set R_OFS:
For Positive Offset (connect R_OFS to VCC):
R_OFS
=
-²-----^×-----^R----^R-----^E----^F--
V_OFFSET
(EQ. 7)
For Negative Offset (connect R_OFS to GND):
R_OFS
=
0_----._--5_----×_-----R_{-----R----E----F-}
V_OFFSET
(EQ. 8)
FB
DAC
DYNAMIC
VID D/A
R_REF
E/A
REF
VCC
or
GND
R_OFS
OFS
ISL6556ACB
+
0.5V
-
-
2.0V
+
GND
VCC
FIGURE 6. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556ACB (28-LEAD SOIC)
FB
DYNAMIC
VID D/A
DAC
R_REF
E/A
REF
OFSOUT
VCC
or
GND
-
2.0V
+
+
0.5V
-
VCC
GND
R_OFS
OFS
ISL6556ACR
FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING
WITH ISL6556ACR (32-LEAD QFN)
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