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ISL6556A Datasheet, PDF (18/24 Pages) Intersil Corporation – Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application
ISL6556A
require heat sinks and forced air to cool the MOSFETs,
inductors and heat-dissipating surfaces.
MOSFETs
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching frequency;
the capability of the MOSFETs to dissipate heat; and the
availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (rDS(ON)). In Equation 11, IM is the maximum
continuous output current; IPP is the peak-to-peak inductor
current (see Equation 1); d is the duty cycle (VOUT/VIN); and
L is the per-channel inductance.
PLOW, 1
=
rDS(ON)



-I-M---
N
2
(
1
–
d
)
+
I--L---,---2P----P----(--1--------d----)
12
(EQ. 11)
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at IM, VD(ON); the switching
frequency, fS; and the length of dead times, td1 and td2, at
the beginning and the end of the lower-MOSFET conduction
interval respectively.
PLOW, 2
=
VD(ON) fS


-I-M---
N
+
-I-P-2---P--
td1
+


I--M---
N
-
-I-P-2---P--
td2
(EQ. 12)
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of PLOW,1 and
PLOW,2.
UPPER MOSFET POWER CALCULATION
In addition to rDS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (VIN) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Qrr; and the upper MOSFET rDS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 13,
the required time for this commutation is t1 and the
approximated associated power loss is PUP,1.
P U P,1
≈
VIN


I--M---
N
+
I--P--2--P--



t--1--


2
fS
(EQ. 13)
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t2. In Equation 14, the
approximate power loss is PUP,2.
PUP, 2
≈
VIN


I--M---
N
–
I--P----P--
2



t--2--


2
fS
(EQ. 14)
A third component involves the lower MOSFET’s reverse-
recovery charge, Qrr. Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Qrr, it is conducted
through the upper MOSFET across VIN. The power
dissipated as a result is PUP,3 and is approximately
PUP,3 = VIN Qrr fS
(EQ. 15)
Finally, the resistive part of the upper MOSFETs is given in
Equation 16 as PUP,4.
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 13, 14, 15 and 16. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
PUP,4 ≈ rDS(ON)



-I-M---
N
2
d
+
-I-P----P--2-
12
(EQ. 16)
Current Sensing
The ISEN pins are denoted ISEN1, ISEN2, ISEN3 and
ISEN4. The resistors connected between these pins and the
respective phase nodes determine the gains in the load-line
regulation loop and the channel-current balance loop as well
as setting the overcurrent trip point. Select values for these
resistors based on the room temperature rDS(ON) of the
lower MOSFETs; the full-load operating current, IFL; and the
number of phases, N using Equation 17 (see also Figure 3).
RISEN
=
7-r--D-0---S--×--(-1-O--0---N-–--6-)-
I--F----L-
N
(EQ. 17)
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistor. When the components of
one or more channels are inhibited from effectively dissipating
their heat so that the affected channels run hotter than
desired, choose new, smaller values of RISEN for the affected
phases (see the section entitled Channel-Current Balance).
Choose RISEN,2 in proportion to the desired decrease in
temperature rise in order to cause proportionally less current
to flow in the hotter phase.
RISEN,2
=
RISEN
∆-----T----2-
∆T1
(EQ. 18)
18