ISL22426 Datasheet, PDF (3/15 Pages) Intersil Corporation – Low Noise, Low Power, SPI Bus, 128 Taps

ISL22426
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to V_CC + 0.3
V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . -0.3V to V_CC
I_W (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 4) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD Ratings
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .350V
Thermal Information
Thermal Resistance (Typical)
θ_JA (°C/W) θ_JC (°C/W)
14 Lead TSSOP (Note 1) . . . . . . . . . . . 100
N/A
16 Lead QFN (Notes 2, 3) . . . . . . . . . .
40
3.0
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C
V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θ_JC, the “case temp” location is the center of the exposed metal pad on the package underside.
4. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications Over recommended operating conditions, unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 22) (Note 5) (Note 22) UNIT
R_TOTAL R_H to R_L Resistance
W option
U option
10
kΩ
50
kΩ
R_H to R_L Resistance Tolerance
End-to-End Temperature Coefficient
W and U option
W option
-20
+20
%
±50
ppm/°C
(Note 21)
U option
±80
ppm/°C
(Note 21)
V_RH, V_RL V_RH and V_RL Terminal Voltages
R_W
Wiper Resistance
C_H/C_L/C_W Potentiometer Capacitance
(Note 21)
V_RH and V_RL to GND
V_CC = 3.3V, wiper current = V_CC/R_TOTAL
0
V_CC
V
70
200
Ω
10/10/25
pF
I_LkgDCP Leakage on DCP Pins
Voltage at pin from GND to V_CC
0.1
VOLTAGE DIVIDER MODE (0V @ R_Li; V_CC @ R_Hi; measured at R_Wi, unloaded; i = 0 or 1)
INL
Integral Non-linearity
(Note 10)
Monotonic over all tap positions, W and U
-1
options
1
µA
1
LSB
(Note 6)
DNL Differential Non-linearity
(Note 9)
Monotonic over all tap positions, W and U
-0.5
options
0.5
LSB
(Note 6)
ZSerror Zero-scale Error
(Note 7)
W option
0
1
5
LSB
(Note 6)
U option
0
0.5
2
LSB
(Note 6)
FSerror Full-scale Error
(Note 8)
W option
-5
-1
0
LSB
(Note 6)
U option
-2
-1
0
LSB
(Note 6)
3
FN6180.2
September 8, 2009