English
Language : 

ISL6314_14 Datasheet, PDF (29/32 Pages) Intersil Corporation – Single-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications
ISL6314
addresses the leading edge. Normally, the trailing edge
dictates the selection of L because duty cycles are usually
less than 50%. Nevertheless, both inequalities should be
evaluated, and L should be selected based on the lower of
the two results. In each equation, L is the inductance, and C
is the total output capacitance.
2 ⋅ C ⋅ VO
L
≤
------------------------
(ΔI)2
⋅
ΔVMAX – (ΔI ⋅ ESR)
(EQ. 40)
L ≤ -1---.--2---5-----⋅---C-- ⋅
(ΔI)2
ΔVMAX – (ΔI ⋅ ESR)
⋅ ⎝⎛VIN – VO⎠⎞
(EQ. 41)
Switching Frequency
There are a number of variables to consider when choosing
the switching frequency, as there are considerable effects on
the upper MOSFET loss calculation. These effects are
outlined in “MOSFETs” on page 23, and they establish the
upper limit for the switching frequency. The lower limit is
established by the requirement for fast transient response
and small output-voltage ripple. Choose the lowest switching
frequency that allows the regulator to meet the
transient-response requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, RT. Figure 22 and Equation 42
are provided to assist in selecting the correct value for RT.
RT
=
[10.61
10
–
(1.035
⋅
log
(fS))]
(EQ. 42)
500
100
10
50
100
1k
2k
SWITCHING FREQUENCY (kHz)
FIGURE 22. RT vs SWITCHING FREQUENCY
Input Capacitor Selection
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capacity must be sufficient to
handle the ac component of the current drawn by the upper
MOSFETs which is related to duty cycle and the number of
active phases.
Use Figure 23 to determine the input-capacitor RMS current
requirement set by the duty cycle, maximum sustained
output current (IO), and the ratio of the peak-to-peak inductor
current (IL(P-P)) to IO. Select a bulk capacitor with a ripple
29
current rating which will minimize the total number of input
capacitors required to support the RMS current calculated.
The voltage rating of the capacitors should also be at least
1.25x greater than the maximum input voltage.
.
0.6
0.4
0.2
IL(P-P) = 0
IL(P-P) = 0.5 IO
IL(P-P) = 0.75 IO
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (VO/VIN)
FIGURE 23. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR SINGLE-PHASE CONVERTER
Low capacitance, high-frequency ceramic capacitors are
needed in addition to the input bulk capacitors to suppress
leading and falling edge voltage spikes. The spikes result from
the high current slew rate produced by the upper MOSFET
turn on and off. Select low ESL ceramic capacitors and place
one as close as possible to each upper MOSFET drain to
minimize board parasitics and maximize suppression.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit
and lead to device overvoltage stress. Careful component
selection, layout, and placement minimizes these voltage
spikes. Consider, as an example, the turnoff transition of the
upper PWM MOSFET. Prior to turn-off, the upper MOSFET
was carrying channel current. During the turn-off, current
stops flowing in the upper MOSFET and is picked up by the
lower MOSFET. Any inductance in the switched current path
generates a large voltage spike during the switching interval.
Careful component selection, tight layout of the critical
components, and short, wide circuit traces minimize the
magnitude of voltage spikes.
There are two sets of critical components in a DC/DC
converter using a ISL6314 controller. The power
components are the most critical because they switch large
amounts of energy. Next, are small signal components that
connect to sensitive nodes or supply critical bypassing
current and signal coupling.
FN6455.2
October 8, 2009