English
Language : 

ISL6314_14 Datasheet, PDF (27/32 Pages) Intersil Corporation – Single-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications
ISL6314
C2 (OPTIONAL)
RC CC
COMP
FB
ISL6314
RFB
VDIFF
FIGURE 20. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6314 CIRCUIT
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
Select a target bandwidth for the compensated system, f0.
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
switching frequency. The values of the compensation
components depend on the relationships of f0 to the L-C
pole frequency and the ESR zero frequency. For each of the
following three, there is a separate set of equations for the
compensation components.
In Equation 36, L is the filter inductance; C is the sum total of
all output capacitors; ESR is the equivalent series resistance
of the bulk output filter capacitance; and VP-P is the
peak-to-peak sawtooth signal amplitude, as described in the
“Electrical Specifications” on page 6.
Once selected, the compensation values in Equation 36
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to RC. Slowly increase the
value of RC while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
CC will not need adjustment. Keep the value of CC from
Equation 36 unless some performance issue is noted.
Case 1:
---------------1----------------
2⋅π⋅ L⋅C
>
f0
RC
=
RFB
⋅
2-----⋅---π-----⋅---f--0-----⋅---V----P------P-----⋅-------L-----⋅---C---
VIN
CC
=
-----------------------V----I--N------------------------
2 ⋅ π ⋅ VP-P ⋅ RFB ⋅ f0
Case 2:
---------------1----------------
2⋅π⋅ L⋅C
≤
f0
<
2-----⋅---π-----⋅---C--1----⋅---E----S-----R---
RC
=
RFB
⋅
V-----P------P-----⋅---(--2-----⋅---π----)--2-----⋅----f--0--2----⋅----L-----⋅---C--
VIN
CC
=
---------------------------------------V----I--N-----------------------------------------
(2 ⋅ π)2 ⋅ f02 ⋅ VP-P ⋅ RFB ⋅ L ⋅ C
(EQ. 36)
Case 3:
f0 > 2-----⋅---π-----⋅---C--1----⋅---E----S-----R---
RC = RFB ⋅ -2----⋅---π--V----⋅I--N-f--0---⋅-⋅--E-V---S-P---R----P-----⋅---L-
CC
=
-------------V----I--N------⋅---E----S-----R-----⋅--------C---------------
2 ⋅ π ⋅ VP-P ⋅ RFB ⋅ f0 ⋅ L
The optional capacitor C2, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 20). Keep
a position available for C2, and be prepared to install a
high-frequency capacitor of between 22pF and 150pF in
case any leading edge jitter problem is noted. For the
solutions in Equation 36, RFB is selected arbitrarily, typically
in the 1kΩ to 5kΩ range.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 21, provides the
necessary compensation.
The first step is to choose the desired bandwidth, f0, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, fHF. This pole can be used for
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to choose fHF = 10f0, but it can be
higher if desired. Choosing fHF to be lower than 10f0 can
cause problems with too much phase shift below the system
bandwidth.
27
FN6455.2
October 8, 2009