ISL6316_06 Datasheet, PDF (28/29 Pages) Intersil Corporation – Enhanced 4-Phase PWM Controller with 6-Bit VID Code Capable of Precision rDS(ON) or DCR Differential Current Sensing for VR10 Application

ISL6316
MULTIPHASE RMS IMPROVEMENT
Figure 24 is provided as a reference to demonstrate the
dramatic reductions in input-capacitor RMS current upon the
implementation of the multiphase topology. For example,
compare the input rms current requirements of a two-phase
converter versus that of a single phase. Assume both
converters have a duty cycle of 0.25, maximum sustained
output current of 40A, and a ratio of I_L,P-P to I_O of 0.5. The
single phase converter would require 17.3Arms current
capacity while the two-phase converter would only require
10.9Arms. The advantages become even more pronounced
when output current is increased and additional phases are
added to keep the component cost down relative to the single
phase approach.
0.6
0.4
0.2
I_L,P-P = 0
I_L,P-P = 0.5 I_O
I_L,P-P = 0.75 I_O
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (V_O/V_IN)
FIGURE 24. NORMALIZED INPUT-CAPACITOR RMS
CURRENT vs DUTY CYCLE FOR SINGLE-PHASE
CONVERTER
Layout Considerations
The following layout strategies are intended to minimize the
impact of board parasitic impedances on converter
performance and to optimize the heat-dissipating capabilities
of the printed-circuit board. These sections highlight some
important practices which should not be overlooked during the
layout process.
Component Placement
Within the allotted implementation area, orient the switching
components first. The switching components are the most
critical because they carry large amounts of energy and tend
to generate high levels of noise. Switching component
placement should take into account power dissipation. Align
the output inductors and MOSFETs such that space between
the components is minimized while creating the PHASE
plane. Place the Intersil MOSFET driver IC as close as
possible to the MOSFETs they control to reduce the parasitic
impedances due to trace length between critical driver input
and output signals. If possible, duplicate the same placement
of these components for each phase.
Next, place the input and output capacitors. Position one high-
frequency ceramic input capacitor next to each upper
MOSFET drain. Place the bulk input capacitors as close to the
upper MOSFET drains as dictated by the component size and
dimensions. Long distances between input capacitors and
MOSFET drains result in too much trace inductance and a
reduction in capacitor performance. Locate the output
capacitors between the inductors and the load, while keeping
them in close proximity to the microprocessor socket.
The ISL6316 can be placed off to one side or centered relative
to the individual phase switching components. Routing of
sense lines and PWM signals will guide final placement.
Critical small signal components to place close to the
controller include the ISEN resistors, R_T resistor, feedback
resistor, and compensation components.
Bypass capacitors for the ISL6316 and ISL66XX driver bias
supplies must be placed next to their respective pins. Trace
parasitic impedances will reduce their effectiveness.
Plane Allocation and Routing
Dedicate one solid layer, usually a middle layer, for a ground
plane. Make all critical component ground connections with
vias to this plane. Dedicate one additional layer for power
planes; breaking the plane up into smaller islands of common
voltage. Use the remaining layers for signal wiring.
Route phase planes of copper filled polygons on the top and
bottom once the switching component placement is set. Size
the trace width between the driver gate pins and the MOSFET
gates to carry 4A of current. When routing components in the
switching path, use short wide traces to reduce the associated
parasitic impedances.
28
FN9227.1
December 12, 2006