ISL6316_06 Datasheet, PDF (15/29 Pages) Intersil Corporation – Enhanced 4-Phase PWM Controller with 6-Bit VID Code Capable of Precision rDS(ON) or DCR Differential Current Sensing for VR10 Application

ISL6316
or the integrated temperature compensation function of
ISL6316 should be utilized. The integrated temperature
compensation function is described in the Temperature
Compensation section.
Channel-Current Balance
The sensed current I_n from each active channel are summed
together and divided by the number of active channels. The
resulting average current I_AVG provides a measure of the total
load current. Channel current balance is achieved by
comparing the sampled current of each channel to the
average current to make an appropriate adjustment to the
WPM duty cycle of each channel. Intersil’s patented current-
balance method is illustrated in Figure 7. In the figure, the
average current combines with the channel 1 current I₁ to
create an error signal I_ER. The filtered error signal modifies
the pulse width commanded by V_COMP to correct any
unbalance and force I_ER toward zero. The same method for
error signal correction is applied to each active channel.
+
V_COMP
+
-
-
FILTER F(JΩ) ^{SAWTOOTH SIGNAL}
I_ER
I_AVG
÷N
-
Σ
+
PWM1
I₄ *
I₃ *
I₂
I₁
NOTE: *CHANNELS 3 AND 4 ARE OPTIONAL.
FIGURE 7. CHANNEL-1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
Channel current balance is essential in achieving the thermal
advantage of multiphase operation. With good current
balance, the power loss is equally dissipated over multiple
devices and a greater area.
Voltage Regulation
The compensation network shown in Figure 8 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6316 to include the combined tolerances of each of
these elements.
The output of the error amplifier, V_COMP, is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Intersil MOSFET drivers and
regulate the converter output to the specified reference
voltage. The internal and external circuitry which control
voltage regulation is illustrated in Figure 8.
EXTERNAL CIRCUIT
R_C C_{C COMP}
R_REF
C_REF
DAC
REF
FB
R_FB
+
IDROOP
V_DROOP
-
VDIFF
ISL6316 INTERNAL CIRCUIT
I_AVG
+
-
V_COMP
ERROR AMPLIFIER
V_OUT+
VSEN
+
V_OUT-
RGND
-
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 8. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6316 incorporates an internal differential remote-sense
amplifier in the feedback path. The amplifier removes the
voltage error encountered when measuring the output voltage
relative to the local controller ground reference point resulting in
a more accurate means of sensing output voltage. Connect the
microprocessor sense pins to the non-inverting input, VSEN,
and inverting input, RGND, of the remote-sense amplifier. The
remote-sense output, V_DIFF, is connected to the inverting input
of the error amplifier through an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the 6-bit logic signal (VID)
into one of the discrete voltages shown in Table 1. Each VID
input offers a 45μA pull-up to an internal 2.5V source for use
with open-drain outputs. The pull-up current diminishes to
zero above the logic threshold to protect voltage-sensitive
output devices. External pull-up resistors can augment the
pull-up current sources if case leakage into the driving device
is greater than 45μA.
15
FN9227.1
December 12, 2006