ISL6313B Datasheet, PDF (28/33 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR11 and AMD Applications

ISL6313B
C₂ (OPTIONAL)
R_C ^CC
COMP
FB
ISL6313B
R_FB
VSEN
FIGURE 22. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6313B CIRCUIT
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
Select a target bandwidth for the compensated system, f₀.
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f₀
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
In Equation 41, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent series resistance of
the bulk output filter capacitance; and V_PP is the
peak-to-peak sawtooth signal amplitude as described in the
Electrical Specifications on page 6.
Once selected, the compensation values in Equation 41
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R_C. Slowly increase the
value of R_C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C_C will not need adjustment. Keep the value of C_C from
Equation 41 unless some performance issue is noted
The optional capacitor C₂, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 22). Keep
a position available for C₂, and be prepared to install a high-
frequency capacitor of between 22pF and 150pF in case any
leading edge jitter problem is noted.
28
Case 1:
---------------1----------------
2⋅π⋅ L⋅C
>
f₀
R_C
=
R_FB
⋅
2-----⋅_---π_-----⋅_---f--0----⋅_{---V-----p---p----}⋅_{--------L----}⋅_---C---
V_IN
C_C
=
----------------------V----^I--^N------------------------
2 ⋅ π ⋅ V_PP ⋅ R_FB ⋅ f₀
Case 2:
---------------1----------------
2⋅π⋅ L⋅C
≤
f₀
<
2-----⋅^---π^-----⋅^---C--1----⋅^{---E----S-----R---}
R_C
=
R_F
B
⋅
V-----_P----P-----⋅_---(_--2-----⋅_---π_----)_--²_----⋅_-----f-0--²_-----⋅_---L-----⋅_---C---
V_IN
C_C
=
--------------------------------------V-----^I--^N----------------------------------------
(2 ⋅ π)² ⋅ f₀₂ ⋅ V_PP ⋅ R_FB ⋅ L ⋅ C
(EQ. 41)
Case 3:
f₀ > _2-----â‹---_π-----_â‹---C--1----_â‹---E----S-----R---
R_C = R_FB ⋅ -2----^â‹---^π-V----_I-^â‹-_N--f--⁰-_â‹---^â‹_E---V--S--^p--R--^p----^â‹---L--
C_C
=
-------------V----^I--^N-----^â‹---E----S-----R------^â‹-------C---------------
2 ⋅ π ⋅ V_PP ⋅ R_FB ⋅ f₀ ⋅ L
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 23, provides the
necessary compensation.
C₂
R_C ^CC
COMP
C₁
R₁
R_FB
FB
ISL6313B
VSEN
FIGURE 23. COMPENSATION CIRCUIT WITHOUT LOAD-LINE
REGULATION
The first step is to choose the desired bandwidth, f₀, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, f_HF. This pole can be used for
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
FN6809.0
November 6, 2008