X98024 Datasheet, PDF (27/29 Pages) Intersil Corporation – 240MHz Triple Video Digitizer with Digital PLL

X98024
START Command
Signals the beginning of serial I/O
X98024 Serial Bus Address
R/W _{X98024 Serial Bus Address Write}
This is the 7 bit address of the X98024 on the 2 wire bus. The
1
0
0
1
1
0
A
0 ^{address is 0x4C if pin 48 is low, 0x4D if pin 48 is high. Shift this}
(pin 48)
value to left when adding the R/W bit
A7
A6
D7
D6
Signals from
the Host
SDA Bus
Signals from
the X98024
X98024 Register Address Write
A5
A4
A3
A2
A1
A0 _{This is the address of the X98024’s configuration register that}
the following byte will be written to.
X98024 Register Data Write(s)
D5
D4
D3
D2
D1
D0
This is the data to be written to the X98024’s configuration register.
(Repeat if desired)
Note: The X98024’s Configuration Register’s address pointer auto
increments after each data write: repeat this step to write multiple
sequential bytes of data to the Configuration Register.
STOP Command
Signals the ending of serial I/O
S
T _{Serial Bus}
A
R
Address
T
Register
Address
Data
S
T
Write*
O
P
100110A0 aaaaaaaa dddddddd
A
A
A
C
C
C
K
K
K
* The data write step may be repeated to write to the X98024’s
Configuration Register sequentially, beginning at the Register
Address written in the previous step.
FIGURE 15. CONFIGURATION REGISTER WRITE
27
FN8220.0
June 6, 2005