ISL6336 Datasheet, PDF (27/31 Pages) Intersil Corporation – 6-Phase PWM Controller with Light Load Efficiency Enhancement and Current Monitoring

ISL6336, ISL6336A
C₂ (OPTIONAL)
ISL6336, ISL6336A
R_C ^CC
COMP
R_FB
+
V_DROOP
-
FB
VDIFF
FIGURE 19. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6336, ISL6336A
CIRCUIT
The feedback resistor, R_FB, has already been chosen as
outlined in “Load-Line Regulation Resistor” on page 26.
Select a target bandwidth for the compensated system, f₀.
The target bandwidth must be large enough to ensure
adequate transient performance, but generally smaller than
1/3 of the per-channel switching frequency. The values of the
compensation components depend on the relationships of f₀
to the L-C pole frequency and the ESR zero frequency. For
each of the three cases which follow, there are a separate
set of equations for the compensation components.
Case 1:
---------1----------
2π LC
>
f₀
R_C
=
R_F
B
2----π_{----f--0---V-----P------P--------L----C---}
0.75 V _{I N}
C_C = _2----π----0V---.-_P-7---5_P----VR----^I-_F-^N--_B----f--₀-
Case 2:
---------1----------
2π LC
≤
f₀
<
2----π^----C-----(^{-1-E-----S----R-----})
R_C
=
R_FB
V-----_P------P----(_--2----π_----)_--²_-----f--0--²_----L---C---
0.75 V_IN
C_C
=
--------------------0----.-7----5---V-----^I--^N---------------------
(2π)² f₀₂ V_PPR_FB LC
(EQ. 37)
Case 3:
f₀
>
--------------1---------------
2πC(ESR)
R_C = R_{FB 0----.--7-2--5-}^π----V-f--⁰-_I--_N^V----P-₍--E-^---^P--S--L--R-----₎
C_C
=
0----.--7---5----V----_I--N----(_{--E-----S----R-----})_-------C---
2πV_P-PR_FBf₀ L
In Equation 37, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V_PP is the peak-to-
peak sawtooth signal amplitude as described in the
“Electrical Specifications” table beginning on page 7.
The optional capacitor C₂, is sometimes needed to bypass
noise away from the PWM comparator (see Figure 19). Keep
a position available for C₂, and be prepared to install a high
frequency capacitor between 22pF and 150pF in case
excessive jitter is noted.
Once selected, the compensation values in Equation 37
ensure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R_C. Slowly increase the
value of R_C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
C_C will not need adjustment. Keep the value of C_C from
Equation 37 unless some performance issue is noted.
C₁ and R₁ can also be added to improve transient
performance per the type III compensation discussion below.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
C₂
R_C ^CC
ISL6336, ISL6336A
COMP
C₁
R₁
R_FB
FB
VDIFF
FIGURE 20. COMPENSATION CIRCUIT FOR ISL6336, ISL6336A
BASED CONVERTER WITHOUT LOAD-LINE
REGULATION
The first step is to choose the desired bandwidth, f₀, of the
compensated system. Choose a frequency high enough to
ensure adequate transient performance but generally not
higher than 1/3 of the switching frequency. The type-III
compensator has an extra high-frequency pole, f_HF. This
pole can be used for added noise rejection or to ensure
adequate attenuation at the error-amplifier high-order pole
and zero frequencies. A good general rule is to choose
f_HF = 10f₀, but it can be higher if desired. Choosing f_HF to be
lower than 10f₀ can cause problems with too much phase
shift below the system bandwidth.
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 38, R_FB is selected arbitrarily. The remaining
compensation components are then selected according to
Equation 38.
27
FN6504.1
May 28, 2009