ISL6336B Datasheet, PDF (25/31 Pages) Intersil Corporation – 6-Phase PWM Controller with Light Load Efficiency Enhancement and Current Monitoring

ISL6336B
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multiphase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced in the
following. In addition to this guide, Intersil provides complete
reference designs that include schematics, bills of materials,
and example board layouts for all common microprocessor
applications.
Power Stages
The first step in designing a multiphase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted; and
the total board space available for power-supply circuitry.
Generally speaking, the most economical solutions are
those in which each phase handles generally between 20A
and 25A. All surface-mount designs will tend toward the
lower end of this current range. If through-hole MOSFETs
and inductors can be used, higher per-phase currents are
possible. In cases where board space is the limiting
constraint, current can be pushed as high as 40A per phase,
but these designs require heat sinks and forced air to cool
the MOSFETs, inductors, and heat-dissipating surfaces.
MOSFETS
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching
frequency; the capability of the MOSFETs to dissipate heat;
and the availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (r_DS(ON)). In Equation 26, I_M is the maximum
continuous output current; I_P-P is the peak-to-peak inductor
current (see Equation 1); d is the duty cycle (V_OUT/V_IN); and
L is the per-channel inductance.
P_{LOW, 1}
=
r_DS(ON)
⎛
⎜
⎝
I--_{M---⎟⎞}
N⎠
2
(
1
–
d
)
+
I--_{L---,---P-------P--}²_---(_---1-----–_----d---)
12
(EQ. 26)
An additional term can be added to Equation 26 to account
for additional loss accrued during the dead-time when
inductor current is flowing through the lower-MOSFET body
diode. This term is dependent on the diode forward voltage
at I_M, V_D(ON); the switching frequency, F_S; and the length of
dead times, t_D1 and t_D2, at the beginning and the end of the
lower-MOSFET conduction interval respectively.
P_{LOW, 2}
=
V_D(ON) F_S
⎛
⎝
I--_M---
N
+
I--_{P---2----P--⎠⎞}
t_d1
+
⎛
⎜
-I-^M---
⎝N
–
I--_{P--------P-⎟⎞}
2⎠
t_d2
(EQ. 27)
Thus, the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P_LOW,1 and
P_LOW,2.
UPPER MOSFET POWER CALCULATION
In addition to r_DS(ON) losses, a large portion of the upper
MOSFET losses are due to currents conducted across the
input voltage (V_IN) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse
recovery charge, Q_rr; and the upper MOSFET r_DS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 28,
the required time for this commutation is t₁ and the
approximated associated power loss is P_UP,1.
P _{U P,1}
≈
V_IN
⎛
⎝
-I-^M---
N
+
I--_{P---2----P--⎠⎞}
⎛
⎜
⎝
t--_1--
⎞
⎟
2_⎠
F_S
(EQ. 28)
At turn-on, the upper MOSFET begins to conduct and this
transition occurs over a time t₂. In Equation 29, the
approximate power loss is P_UP,2.
P_{UP, 2}
≈
V_IN
⎛
⎜
-I-^M---
⎝^N
–
I--_{P-------P--⎟⎞}
2_⎠
⎛
⎜
⎝
t--_2--
2
⎞
⎟
⎠
F_S
(EQ. 29)
A third component involves the lower MOSFET’s reverse
recovery charge, Q_rr. Since the inductor current has fully
commutated to the upper MOSFET before the lower
MOSFET’s body diode can draw all of Q_rr, it is conducted
through the upper MOSFET across VIN. The power dissipated
as a result is P_UP,3 and is approximated in Equation 30:
P_UP,3 = V_IN Q_rr F_S
(EQ. 30)
Finally, the resistive part of the upper MOSFET’s is given in
Equation 31 as P_UP,4.
P_UP,4 ≈ r_DS(ON)
⎛
⎜
⎝
I--_{M---⎟⎞}
N⎠
2
d
+
-I-^P----^---²-^P-
12
d
(EQ. 31)
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 28, 29, 30 and 31. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
25
FN6696.2
August 31, 2010