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ISL6336B Datasheet, PDF (22/31 Pages) Intersil Corporation – 6-Phase PWM Controller with Light Load Efficiency Enhancement and Current Monitoring
ISL6336B
average current exceeds the reference current, a
comparator trips and causes the converter to shutdown.
The voltage at the IMON pin is used for average current
protection (compared to the instantaneous current protection
described above). The current out of the IMON pin is equal to
the sensed average current, IAVG. With a resistor from IMON
to GND, the voltage at IMON will be proportional to the
sensed average current and the resistor value. The ISL6336B
continually monitors the voltage at the IMON pin. If the voltage
at the IMON pin is higher than 1.11V, a comparator trips and
causes the converter to shutdown.
The voltage at the IMON pin may be delayed relative to the
sensed current, IAVG, due to the capacitor that is in parallel
with the IMON resistor to GND that is required in some
applications. This time constant can be >300µs. This lag can
cause the output voltage to remain high for a longer time
period before the OC comparator is tripped. This can lead to
higher duty cycles of the output voltage during overcurrent
hiccup mode. To avoid this the external current sense
resistors should be selected so that the instantaneous
overcurrent trip occurs at about the same sense current level
as the IMON trip. For example, the IMON resistor to GND
should be selected such that the voltage at IMON reaches
1.12V when IAVG reaches ~100µA. Another option is to
remove the capacitor that is in parallel with the IMON resistor
and add the required filter to the output of a IMON buffer.
At the beginning of overcurrent shutdown, the controller places
all PWM signals in a high-impedance state within 20ns
commanding the Intersil MOSFET driver ICs to turn off both
upper and lower MOSFETs. The system remains in this state
for 4096 switching cycles (programmed switching frequency). If
the controller is still enabled at the end of this wait period, it will
attempt a soft-start. If the fault remains, the trip-retry cycles will
continue indefinitely (as shown in Figure 13) until either
controller is disabled or the fault is cleared. Note that the energy
delivered during trip-retry cycling is much less than during full-
load operation, so there is no thermal hazard during this kind of
operation.
OUTPUT CURRENT
0A
OUTPUT VOLTAGE
0V
2ms/DIV
FIGURE 13. OVERCURRENT BEHAVIOR IN HICCUP MODE,
FSW = 500kHz
For the individual channel overcurrent protection, the
ISL6336B continuously compares the sensed current signal
of each channel with the 129µA reference current. If one
channel current exceeds the reference current, ISL6336B
will pull the PWM signal of this channel low for the rest of the
switching cycle. This PWM signal can be turned on next
cycle if the sensed channel-current is less than the 129µA
reference current. The peak current limit of individual
channel will not trigger the converter to shutdown.
The overcurrent protection level for the above three OCP
modes can be adjusted by changing the value of current
sensing resistors. In addition, ISL6336B can also adjust the
average OCP threshold level by adjusting the value of the
resistor from IMON to GND. This provides additional safety
for the voltage regulator.
Equation 19 can be used to calculate the value of the
resistor RIMON based on the desired OCP level IAVG, OCP2.
RIOUT
=
--------1----.-1----1----V----------
IAVG, OCP2
(EQ. 19)
Thermal Monitoring (VR_HOT)
There is one thermal signal to indicate the temperature
status of the voltage regulator: VR_HOT. VR_HOT is an
open-drain output, and an external pull-up resistor is
required. The VR_HOT signal is valid only after the controller
is enabled.
The VR_HOT signal can be used to inform the system that
the temperature of the voltage regulator is too high and the
CPU should reduce its power consumption. VR_HOT signal
may be tied to the CPU’s PROCHOT# signal.
The diagram of the thermal monitoring function block is shown
in Figure 14. One NTC resistor should be placed close to the
power stage of the voltage regulator to sense the operational
temperature, and one pull-up resistor is needed to form the
voltage divider for the TM pin. The NTC thermistor should be
placed next to the current sense element of a phase that will
remain active when PSI# is asserted low. As the temperature
of the power stage increases, the resistance of the NTC will
reduce, resulting in the reduced voltage at the TM pin.
Figure 15 shows the TM voltage over temperature for a typical
design with a recommended 6.8kΩ NTC
(P/N: NTHS0805N02N6801 from Vishay) and 1kΩ resistor
RTM1. We recommend using these resistors for accurate
temperature compensation.
There is a comparator with hysteresis to compare the TM pin
voltage to the fixed thresholds for VR_HOT. VR_HOT is set
to high when the TM voltage goes below 33.3% of VCC, and
is pulled to GND when the TM voltage goes back to above
39.1% of VCC. Figure 16 shows the operation of these
signals.
22
FN6696.2
August 31, 2010