X96011 Datasheet, PDF (22/23 Pages) Intersil Corporation – Temperature Sensor with Look Up Table Memory and DAC

X96011
Figure 17. Example: Writing 12 bytes to a 16-byte page starting at location 11.
7 bytes
Address = 0
Address = 6
5 b5ybtyetess
Address = 11
Address = 7
Address Pointer
Ends Up Here
Address = 15
Read Operation
A Read operation consist of a three byte instruction
followed by one or more Data Bytes (See Figure 18).
The master initiates the operation issuing the following
sequence: a START, the Slave Address byte with the
R/W bit set to “0”, an Address Byte, a second START,
and a second Slave Address byte with the R/W bit set
to “1”. After each of the three bytes, the X96011
responds with an ACK. Then the X96011 transmits
Data Bytes as long as the master responds with an
ACK during the SCL cycle following the eigth bit of
each byte. The master terminates the read operation
(issuing a STOP condition) following the last bit of the
last Data Byte (See Figure 18).
The Data Bytes are from the memory location indicated
by an internal pointer. This pointer initial value is deter-
mined by the Address Byte in the Read operation instruc-
tion, and increments by one during transmission of each
Data Byte. After reaching the memory location CFh a
stop should be issued. If the read operation continues the
output bytes are unpredictable. If the byte address is set
between 00h and 7Fh, or higher than CFh, the output
bytes are unpredictable.
A Read operation internal pointer can start at any
memory location from 80h through CFh, when the
Address Byte is 80h through CFh respectively.
When reading any of the control registers 1, 2, 3, or 4,
the Data Bytes are always the content of the corre-
sponding nonvolatile cells, even if bit NV13 is "0" (See
“Control and Status Register Format”).
Data Protection
There are three levels of data protection designed into
the X96011: 1- Any Write to the device first requires
setting of the WEL bit in Control 6 register; 2- The
Write Protection pin disables any writing to the
X96011; 3- The proper clock count, data bit sequence,
and STOP condition is required in order to start a nonvol-
atile write cycle, otherwise the X96011 ignores the Write
operation.
WP: Write Protection Pin
When the Write Protection (WP) pin is active (LOW),
any Write operations to the X96011 is disabled, except
the writing of the WEL bit.
Figure 18. Read Sequence
S
Signals
t
from the
a
Master
r
t
Slave
Address
with
R/W = 0
Address
Byte
S
Slave
t
Address
a
with
r
R/W = 1
t
S
A
A
t
C
C
o
K
K
p
Signal at
SDA
10 10
Signals from
the Slave
0
A
C
K
10 10
A
C
K
1
A
C
K
First Read
Data Byte
Last Read
Data Byte
22
FN8215.1
October 25, 2005