X96011 Datasheet, PDF (21/23 Pages) Intersil Corporation – Temperature Sensor with Look Up Table Memory and DAC

X96011
Figure 15. Byte Write Sequence
Signals from
the Master
Write
S
t
Slave
a
Address
r
Address
Byte
t
Data
S
Byte
t
o
p
Signal at SDA
10 10
0
Signals from
the Slave
A
A
A
C
C
C
K
K
K
For example, if the master writes 12 bytes to a 16-byte
page starting at location 11 (decimal), the first 5 bytes
are written to locations 11 through 15, while the last 7
bytes are written to locations 0 through 6 within that
page. Afterwards, the address counter would point to
location 7. If the master supplies more than 16 bytes of
data, then new data overwrites the previous data, one
byte at a time (See Figure 17).
The master terminates the loading of Data Bytes by
issuing a STOP condition, which initiates the nonvola-
tile write cycle. As with the Byte Write operation, all
inputs are disabled until completion of the internal
write cycle.
A Page Write operation cannot be performed on the
page at locations 80h through 8Fh. Next section
describes the special cases within that page.
Writing to Control Registers
The bytes at locations 80h, 81h, 83h, 85h, and 86h are
written using Byte Write operations. They cannot be
written using a Page Write operation.
Registers Control 1 and 3 have a nonvolatile and a vol-
atile cell for each bit. At power-up, the content of the
nonvolatile cells is automatically recalled and written to
the volatile cells. The content of the volatile cells con-
Figure 16. Page Write Operation
Signals from
the Master
Signal at SDA
Signals from
the Slave
Write
S
t
a
Slave
r
Address
t
10 10
0
A
C
K
Address
Byte
trols the X96011’s functionality. If bit NV13 in the Con-
trol 0 register is set to “1”, a Write operation to these
registers writes to both the volatile and nonvolatile cells.
If bit NV13 in the Control 0 register is set to “0”, a Write
operation to these registers only writes to the volatile
cells. In both cases the newly written values effectively
control the X96011, but in the second case, those val-
ues are lost when the part is powered down.
If bit NV13 is set to “0”, a Byte Write operation to Con-
trol registers 0 or 5 causes the value in the nonvolatile
cells of Control registers 1 and 3 to be recalled into
their corresponding volatile cells, as during power-up.
This doesn’t happen when the WP pin is LOW,
because Write Protection is enabled. It is generally
recommended to configure Control registers 0 and 5
before writing to Control registers 1 or 3.
A “Byte Write” operation to Control register 1 or 3,
causes the value in the nonvolatile cells of the other to
be recalled into the corresponding volatile cells, as
during power-up.
When reading either of the control registers 1 or 3, the
Data Bytes are always the content of the correspond-
ing nonvolatile cells, even if bit NV13 is “0” (See “Con-
trol and Status Register Format”).
2 < n < 16
S
Data Byte (1)
t
Data Byte (n)
o
p
A
A
A
C
C
C
K
K
K
21
FN8215.1
October 25, 2005