ISL62881_14 Datasheet, PDF (22/35 Pages) Intersil Corporation – Single-Phase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62881, ISL62881B
T2(s) is the voltage loop gain with closed droop loop. It has more
meaning of output voltage response.
Design the compensator to get stable T1(s) and T2(s) with
sufficient phase margin, and output impedance equal or smaller
than the load line slope.
L
VO
Q1
VIN
GATE Q2
DRIVER
COUT
IO
LOAD LINE SLOPE
20Ω
-
MOD
EA
COMP
+
VID
CHANNEL B
LOOP GAIN =
CHANNEL A
+
+
ISOLATION
TRANSFORMER
CHANNEL A
NETWORK
ANALYZER
CHANNEL B
EXCITATION OUTPUT
FIGURE 21. LOOP GAIN T1(s) MEASUREMENT SET-UP
Optional Slew Rate Compensation Circuit For
1-Tick VID Transition
Rdroop
R_vid Cvid
FB
Ivid
Vcore
OPTIONAL
Idroop_vid
COMP
E/A
Σ
DAC
VDAC
X1
INTERNAL TO
IC
VIDs
VID<0:6>
RTN
VSS
VSSSENSE
VID<0:6>
Vfb
Q1
VIN
GATE ^Q2
DRIVER
L
VO
COUT
IO
LOAD LINE SLOPE
MOD
COMP
-
EA
+
VID
+
+
20Ω
CHANNEL B
LOOP GAIN =
CHANNEL A
ISOLATION
TRANSFORMER
CHANNEL A
NETWORK
ANALYZER
CHANNEL B
EXCITATION OUTPUT
FIGURE 22. LOOP GAIN T2(s) MEASUREMENT SET-UP
Ivid
Vcore
Idroop_vid
FIGURE 23. OPTIONAL SLEW RATE COMPENSATION CIRCUIT
FOR1-TICK VID TRANSITION
During a large VID transition, the DAC steps through the VIDs at a
controlled slew rate of 2.5µs or 1.25µs per tick (12.5mV), controlling
output voltage V_core slew rate at 5mV/µs or 10mV/µs.
Figure 23 shows the waveforms of 1-tick VID transition. During
1-tick VID transition, the DAC output changes at approximately
15mV/µs slew rate, but the DAC cannot step through multiple
VIDs to control the slew rate. Instead, the control loop response
speed determines V_core slew rate. Ideally, V_core will follow the FB
pin voltage slew rate. However, the controller senses the inductor
current increase during the up transition, as the I_{droop_vid}
waveform shows, and will droop the output voltage V_core
accordingly, making V_core slew rate slow. Similar behavior occurs
during the down transition.
To control V_core slew rate during 1-tick VID transition, one can
add the R_vid-C_vid branch, whose current I_vid cancels I_{droop_vid}.
When V_core increases, the time domain expression of the
induced I_droop change is as shown in Equation 31:
I_droop(t)
=
-^C---^o---^u----^t---^×-----^L---^L-
R_droop
×
-^d---^V----^c---^o---^r--^e-
dt
×
⎛
⎜
⎜
⎝
1
–
e ^{C----o----u---–-t--t-×-----L---L--}_{⎟⎟⎞}
⎠
(EQ. 31)
22
FN6924.3
June 16, 2011