ISL62881_14 Datasheet, PDF (16/35 Pages) Intersil Corporation – Single-Phase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62881, ISL62881B
V_droop is the droop voltage required to implement load line.
Changing R_droop or scaling I_droop can both change the load line
slope. Since I_droop also sets the overcurrent protection level, it is
recommended to first scale I_droop based on OCP requirement,
then select an appropriate R_droop value to obtain the desired
load line slope.
Differential Sensing
Figure 12 also shows the differential voltage sensing scheme.
VCC_SENSE and VSS_SENSE are the remote voltage sensing signals
from the processor die. A unity gain differential amplifier senses
the VSS_SENSE voltage and adds it to the DAC output. The error
amplifier regulates the inverting and the non-inverting input
voltages to be equal, therefore:
V
C
C_SE
NSE
+
V
d
roo
p
=
V_DAC + VSS_SENSE
(EQ. 3)
Rewriting Equation 3 and substituting Equation 2 gives:
VCC_SENSE – VSS_SENSE = V_DAC – R_droop × I_droop
(EQ. 4)
Equation 4 is the exact equation required for load line
implementation.
The VCC_SENSE and VSS_SENSE signals come from the processor
die. The feedback will be open circuit in the absence of the
processor. As shown in Figure 12, it is recommended to add a
“catch” resistor to feed the VR local output voltage back to the
compensator, and add another “catch” resistor to connect the VR
local output ground to the RTN pin. These resistors, typically
10Ω~100Ω, will provide voltage feedback if the system is
powered up without a processor installed.
CCM Switching Frequency
The R_FSET resistor between the COMP and the VW pins sets the
VW windows size, which therefore sets the switching frequency.
When the ISL62881 is in continuous conduction mode (CCM), the
switching frequency is not absolutely constant due to the nature
of the R^3™ modulator. As explained in “Multiphase R3™
Modulator” on page 12, the effective switching frequency will
increase during load insertion and will decrease during load
release to achieve fast response. On the other hand, the
switching frequency is relatively constant at steady state.
Variation is expected when the power stage condition, such as
input voltage, output voltage, load, etc. changes. The variation is
usually less than 15% and doesn’t have any significant effect on
output voltage ripple magnitude. Equation 5 gives an estimate of
the frequency-setting resistor R_fset value. 8kΩ R_FSET gives
approximately 300kHz switching frequency. Lower resistance
gives higher switching frequency.
R_FSET(kΩ) = (Period(μs) – 0.29) × 2.65
(EQ. 5)
Modes of Operation
TABLE 2. ISL62881 MODES OF OPERATION
CONFIGURATION DPRSLPVR
OPERATIONAL
MODE
VOLTAGE
SLEW RATE
CPU VR Application
0
1-phase CCM
5mV/µs
1
1-phase DE
GPU VR Application
0
1-phase CCM
5mV/µs
1
1-phase DE
10mV/µs
Table 2 shows the ISL62881 operational modes, programmed by
the logic status of the DPRSLPVR pin. The ISL62881 enters
1-phase DE mode when there is DPRSLPVR = 1.
When the ISL62881 is configured for GPU VR application,
DPRSLPVR logic status also controls the output voltage slew
rate. The slew rate is 5mV/µs for DPRSLPVR = 0 and is 10mV/µs
for DPRSLPVR = 1.
Dynamic Operation
When the ISL62881 is configured for CPU VR application, it
responds to VID changes by slewing to the new voltage at
5mV/µs slew rate. As the output approaches the VID command
voltage, the dv/dt moderates to prevent overshoot. Geyserville-III
transitions commands one LSB VID step (12.5mV) every 2.5µs,
controlling the effective dv/dt at 5mv/µs. The ISL62881 is
capable of 5mV/µs slew rate.
When the ISL62881 is configured for GPU VR application, it
responds to VID changes by slewing to the new voltage at a slew
rate set by the logic status on the DPRSLPVR pin. The slew rate is
5mV/µs when DPRSLPVR = 0 and is 10mV/µs when
DPRSLPVR = 1.
When the ISL62881 is in DE mode, it will actively drive the output
voltage up when the VID changes to a higher value. It’ll resume
DE mode operation after reaching the new voltage level. If the
load is light enough to warrant DCM, it will enter DCM after the
inductor current has crossed zero for four consecutive cycles. The
ISL62881 will remain in DE mode when the VID changes to a
lower value. The output voltage will decay to the new value and
the load will determine the slew rate.
The R^3™ modulator intrinsically has voltage feed forward. The
output voltage is insensitive to a fast slew rate input voltage change.
Protections
The ISL62881 provides overcurrent, undervoltage, and overvoltage
protections.
The ISL62881 determines overcurrent protection (OCP) by
comparing the average value of the droop current I_droop with an
internal current source threshold. It declares OCP when I_droop is
above the threshold for 120µs. A resistor R_comp from the COMP
pin to GND programs the OCP current source threshold, as well as
the overshoot reduction function (to be discussed in later sections),
as Table 3 shows. It is recommended to use the nominal R_comp
value. The ISL62881 detects the R_comp value at the beginning of
start-up, and sets the internal OCP threshold accordingly. It
remembers the R_comp value until the VR_ON signal drops below
the POR threshold.
16
FN6924.3
June 16, 2011