ISL6334 Datasheet, PDF (21/30 Pages) Intersil Corporation – VR11.1, 4-Phase PWM Controller with Light Load Efficiency Enhancement and Load Current Monitoring

ISL6334, ISL6334A
Current Sense Output
The current flowing out of the IMON pin is equal to the
sensed average current inside ISL6334, ISL6334A. In typical
applications, a resistor is placed from the IMON pin to GND
to generate a voltage, which is proportional to the load
current and the resistor value, as shown in Equation 17:
V_IOUT
=
--R----^I--^O-----^U----^T-
N
------R----^X-------
R_ISEN
I_L
O
A
D
(EQ. 17)
where V_IMON is the voltage at the IMON pin, R_IMON is the
resistor between the IMON pin and GND, I_LOAD is the total
output current of the converter, R_ISEN is the sense resistor
connected to the ISEN+ pin, N is the active channel number,
and R_X is the DC resistance of the current sense element,
either the DCR of the inductor or R_SENSE depending on the
sensing method.
The resistor from the IMON pin to GND should be chosen to
ensure that the voltage at the IMON pin is less than 1.11V
under the maximum load current. If the IMON pin voltage is
higher than 1.11V, overcurrent shutdown will be triggered, as
described in “Overcurrent Protection” on page 21.
A small capacitor can be placed between the IMON pin and
GND to reduce the noise impact. If this pin is not used, tie it
to GND.
Fault Monitoring and Protection
The ISL6334, ISL6334A actively monitors output voltage and
current to detect fault conditions. Fault monitors trigger
protective measures to prevent damage to a microprocessor
load. One common power-good indicator is provided for linking
to external system monitors. The schematic in Figure 10
outlines the interaction between the fault monitors and the
VR_RDY signal.
VR_RDY Signal
The VR_RDY pin is an open-drain logic output which
indicates that the soft-start period has completed and the
output voltage is within the regulated range. VR_RDY is
pulled low during shutdown and releases high after a
successful soft-start and a fixed delay t_D5. VR_RDY will be
pulled low when an undervoltage or overvoltage condition is
detected, or the controller is disabled by a reset from
EN_PWR, EN_VTT, POR, or VID OFF-code.
Undervoltage Detection
The undervoltage threshold is set at 50% of the VID code.
When the output voltage at VSEN is below the undervoltage
threshold, VR_RDY is pulled low.
Overvoltage Protection
Regardless of the VR being enabled or not, the ISL6334,
ISL6334A overvoltage protection (OVP) circuit will be active
after its POR. The OVP thresholds are different under
different operation conditions. When VR is not enabled and
during the soft-start intervals t_D1, t_D2 and t_D3, the OVP
threshold is 1.273V. Once the controller detects valid VID
input, the OVP trip point will be changed to DAC plus
175mV.
Two actions are taken by ISL6334, ISL6334A to protect the
microprocessor load when an overvoltage condition occurs.
At the inception of an overvoltage event, all PWM outputs
are commanded low instantly (less than 20ns). This causes
the Intersil drivers to turn on the lower MOSFETs and pull
the output voltage below a level to avoid damaging the load.
When the VDIFF voltage falls below the DAC plus 75mV,
PWM signals enter a high-impedance state. The Intersil
drivers respond to the high-impedance input by turning off
both upper and lower MOSFETs. If the overvoltage condition
reoccurs, ISL6334, ISL6334A will again command the lower
MOSFETs to turn on. ISL6334, ISL6334A will continue to
protect the load in this fashion as long as the overvoltage
condition occurs.
Once an overvoltage condition is detected, normal PWM
operation ceases until ISL6334, ISL6334A is reset. Cycling
the voltage on EN_PWR, EN_VTT or VCC below the
POR-falling threshold will reset the controller. Cycling the
VID codes will not reset the controller.
VR_RDY
UV
50%
DAC
VDIFF
SOFT-START, FAULT
AND CONTROL LOGIC
+
OC
-
105µA
I_AVG
+
OV
-
+
OC
-
1.11V
IMON
VID + 0.175V
FIGURE 10. VR_RDY AND PROTECTION CIRCUITRY
Overcurrent Protection
ISL6334, ISL6334A has two levels of overcurrent protection.
Each phase is protected from a sustained overcurrent
condition by limiting its peak current, while the combined
phase currents are protected on an instantaneous basis.
In instantaneous protection mode, ISL6334, ISL6334A
utilizes the sensed average current I_AVG to detect an
overcurrent condition. See “Channel-Current Balance” on
page 15 for more details on how the average current is
21
FN6482.0
February 26, 2008