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ISL6334 Datasheet, PDF (16/30 Pages) Intersil Corporation – VR11.1, 4-Phase PWM Controller with Light Load Efficiency Enhancement and Load Current Monitoring
ISL6334, ISL6334A
EXTERNAL CIRCUIT ISL6334, ISL6334A INTERNAL CIRCUIT
RC CC COMP
RREF
CREF
DAC
REF
RFB
+
VDROOP
-
FB
VDIFF
IAVG
+
-
VCOMP
ERROR AMPLIFIER
VOUT+
VSEN
+
VOUT-
RGND
-
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6334, ISL6334A incorporates an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the local controller ground
reference point, resulting in a more accurate means of
sensing output voltage. Connect the microprocessor sense
pins to the non-inverting input, VSEN, and inverting input,
RGND, of the remote-sense amplifier. The remote-sense
output, VDIFF, is connected to the inverting input of the error
amplifier through an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the eight 6-bit logic signal
(VID) into one of the discrete voltages shown in Table 2. All
VID pins have no internal pull-up current sources after tD3.
After tD3, each VID input offers a minimum 30µA pull-up to
an internal 2.5V source for use with open-drain outputs. The
pull-up current diminishes to zero above the logic threshold
to protect voltage-sensitive output devices. External pull-up
resistors can augment the pull-up current sources in case
leakage into the driving device is greater than 30µA.
TABLE 2. VR11 VID 8 BIT
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE
00000000
OFF
00000001
OFF
0 0 0 0 0 0 1 0 1.60000
0 0 0 0 0 0 1 1 1.59375
0 0 0 0 0 1 0 0 1.58750
0 0 0 0 0 1 0 1 1.58125
TABLE 2. VR11 VID 8 BIT (Continued)
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE
0 0 0 0 0 1 1 0 1.57500
0 0 0 0 0 1 1 1 1.56875
0 0 0 0 1 0 0 0 1.56250
0 0 0 0 1 0 0 1 1.55625
0 0 0 0 1 0 1 0 1.55000
0 0 0 0 1 0 1 1 1.54375
0 0 0 0 1 1 0 0 1.53750
0 0 0 0 1 1 0 1 1.53125
0 0 0 0 1 1 1 0 1.52500
0 0 0 0 1 1 1 1 1.51875
0 0 0 1 0 0 0 0 1.51250
0 0 0 1 0 0 0 1 1.50625
0 0 0 1 0 0 1 0 1.50000
0 0 0 1 0 0 1 1 1.49375
0 0 0 1 0 1 0 0 1.48750
0 0 0 1 0 1 0 1 1.48125
0 0 0 1 0 1 1 0 1.47500
0 0 0 1 0 1 1 1 1.46875
0 0 0 1 1 0 0 0 1.46250
0 0 0 1 1 0 0 1 1.45625
0 0 0 1 1 0 1 0 1.45000
0 0 0 1 1 0 1 1 1.44375
0 0 0 1 1 1 0 0 1.43750
0 0 0 1 1 1 0 1 1.43125
0 0 0 1 1 1 1 0 1.42500
0 0 0 1 1 1 1 1 1.41875
0 0 1 0 0 0 0 0 1.41250
0 0 1 0 0 0 0 1 1.40625
0 0 1 0 0 0 1 0 1.40000
0 0 1 0 0 0 1 1 1.39375
0 0 1 0 0 1 0 0 1.38750
0 0 1 0 0 1 0 1 1.38125
0 0 1 0 0 1 1 0 1.37500
0 0 1 0 0 1 1 1 1.36875
0 0 1 0 1 0 0 0 1.36250
0 0 1 0 1 0 0 1 1.35625
0 0 1 0 1 0 1 0 1.35000
0 0 1 0 1 0 1 1 1.34375
0 0 1 0 1 1 0 0 1.33750
0 0 1 0 1 1 0 1 1.33125
16
FN6482.0
February 26, 2008