ISL6595 Datasheet, PDF (20/22 Pages) Intersil Corporation – Digital Multiphase Controller

ISL6595
drive the serial data line. The ISL6595 will respond with the
MS-byte at the current address. The master will respond with
an Acknowledge to indicate to the ISL6595 that the
transaction is not yet complete. The master again sends
8-clocks but does not drive the serial data line. The ISL6595
will respond with the LS-byte at the current address. The
master will respond with a Not Acknowledge to indicate to
the ISL6595 that the transaction is complete. The ISL6595
will stop driving the serial data line. The master then issues a
Stop condition to indicate that the transaction is complete.
If the ISL6595 has started an internal operation in response
to a transaction on the I²C bus (register read/write, flash
write, flash page erase) but the operation has not completed
before the last Acknowledge slot in the I²C bus protocol, the
ISL6595 will add wait states by stretching the low portion of
the last clock cycle. This also occurs in response to
read/write requests to addresses that do not support
physical memory in the ISL6595. In this case, the ISL6595
will add wait states until an internal watchdog timer expires,
and the I²C bus is guaranteed to be released.
I²C Read and Write Protocol
DATA WRITE
S SLAVE_ADDR + W A REG_ADDR MSB A REG_ADDR LSB A REG_DATA MSB A REG_DATA LSB A P
SET CURRENT ADDRESS
S SLAVE_ADDR + W A REG_ADDR MSB A REG_ADDR LSB A P
READ FROM CURRENT ADDRESS
S SLAVE_ADDR + R A REG_ADDR MSB A REG_ADDR LSB N P
DRIVEN BY MASTER
DRIVEN BY SLAVE
Key Registers
Table 4 provides brief descriptions of several key configuration (R/W – read/write) and status (RO – read only) registers available
on the ISL6595 Digital Multiphase Controller.
TABLE 4. KEY REGISTERS
REGISTER
DESCRIPTION
FORMAT
isum_avg[18:0]
VR load current. Averaged sum of all channel current data RO
over a user programmable averaging window
(default = 16ms).
vavp_avg_mon[9:0]
AVP output voltage. Averaged VAVP monitored value ADC RO
voltage.
kavp [9:0]
AVP loadline slope. Nominal value of load line slope
R/W
resistance.
load_line_offset [4:0]
AVP loadline VID offset. VID set-point load-line offset
R/W
tolerance voltage.
isum_max [7:0]
Overcurrent limit. Max load current threshold for over
R/W
current shutdown.
ptat_mon[5:0]
PTAT Temperature. Averaged PTAT calibration
RO
temperature output.
ptat_alert_ref[5:0]
PTAT alert temperature. PTAT sensor alert temperature
R/W
reference.
ptat_shutdown_ref[5:0] PTAT shutdown temperature. PTAT sensor shutdown
R/W
temperature reference.
temp_mon[5:0]
Thermistor temperature. Averaged Thermistor monitor
RO
temperature output.
therm_alert_ref[5:0]
Thermistor alert temperature. Thermistor sensor alert
R/W
temperature reference.
therm_shutdown_ref[5:0] Thermistor shutdown temperature. Thermistor sensor
R/W
shutdown temperature reference.
RANGE
MIN
MAX
0.00A
524.288A
RESOLUTION
1mA
0.0mV 3,196.875mV 3.125mV
0.0Ω
3.902mΩ 0.003815mΩ
0.0V
48.4375mV 1.5625mV
0.0A
+204.0A
0.800A
0°C
157.5°C
2.5°C
0°C
157.5°C
2.5°C
0°C
157.5°C
2.5°C
0°C
157.5°C
2.5°C
0°C
157.5°C
2.5°C
0°C
157.5°C
2.5°C
20
FN9192.2
December 4, 2008